Simple Question regarding divide by 3 counter-Please help!

[MikeMl]

Did you follow the link I posted above? (the 2:16pm post)

 

[fouadalnoor]

eh?

I cant see a specific link...I can see the graycode and shift counter stuff, but thats just wiki (I have looked at it)

 

[fouadalnoor]

hmm, I can see from your description of the Johnson counter that it counts in gray code. Two bits would be: 00,10,11,01,00... (4 states,thus divide by 4) and this is done when feeding the output back to the input. If we add another counter to that we get a third output and the sequence would be: 000,100,110,111,011,001,000 which gives us 7 states! (i.e divide by 7) now in my divide by 10 case I need at least 10 states so using 5 bistable's I would get:

00000
10000
11000
11100
11110
11111
01111
00111
00011
00001

10 States, thus divide by 10 without any gates?!!! (is that how it works basically)?

 

[MikeMl]

hmm, I can see from your description of the Johnson counter that it counts in gray code. Two bits would be: 00,10,11,01,00... (4 states,thus divide by 4) and this is done when feeding the output back to the input. If we add another counter to that we get a third output and the sequence would be: 000,100,110,111,011,001,000 which gives us 7 states! (i.e divide by 7) now in my divide by 10 case I need at least 10 states so using 5 bistable's I would get:

00000
10000
11000
11100
11110
11111
01111
00111
00011
00001

10 States, thus divide by 10 without any gates?!!! (is that how it works basically)?

You got it, except on the 3bit Johnson counter example, you counted 000 twice; there are only SIX states.

For a Johnson counter, it has 2n states, where n is the number of flip-flops.

 

[fouadalnoor]

Oh yeah, my bad!

Thannkkkss!

Ok, so I have now designed the divide by 10 counter and it works! Right I think I have now fully understood why by taking the output of the last FF we get the sequence!

(Correct me if I'm wrong)

If say we connect two D-Types together and take Q2(Bar) into D1. Say Q2 = 0 and Q2(bar) = 1 at the start.

Then D1 = 1 and at the clock edge we will get Q1 = 1, but D2 = 0 and Q2 = 0 still as it has not shifted through.
(we now have the sequence 00, 10)

Now, D1 = 1 still as Q2 = 0 still and Q2(bar) = 1

Next clock edge and we shift through and we get (00,10,11)
But now the Q2 = 1 and thus Q2(bar) = 0 thus D1 = 0

Next clock edge we shift through and we get

(00,10,11,01)

Now Q2 = 1 still and Q2(bar) = 0 thus D1 = 0.

Next clock edge we shift through again:

(00,10,11,01,00)

Yes!?!

 

[MikeMl]

There is no reason you cannot write a Present State - Next State Table for any counter. e.g for a three bit Johnson counter:

Present Next
000 100
100 110
110 111
111 011
011 001
001 000
...


The equations for the D inputs are D1=Q0, D2=Q1, D0=Q2bar

Left as an exercise for the student: What happens if the power-up state just happens to come up 101? Do you need a power-up reset circuit that forces the power up state to be 000 or 111?

 

[fouadalnoor]

Umm well, If it powers up at 101 then it would start counting from there, though in that case it would be the wrong sequence (I think). I guess we do need a power up circuit to make sure it's at 000 or 111. We could write down all possible states in an ASM Chart and then draw a truth table (present Outputs, Next Input) and then make it so that all possible states have been accounted for (it goes 000 whenever the unused states are there).

Is that on the right lines?

 

[MikeMl]

By Jove, I think he/she has got it. To do a full-up design, you have to consider all possible starting states, even if they are not part of the desired counting sequence, to see if any of them lead to an undesired, but stable sequence. You can fix a hazard like this either by adding some gate(s) that will steer the bogus sequence into the desired one, or take care of it at power-up by clearing or setting all the flops to begin with.

 

[fouadalnoor]

Yeah, we can set it by using the PRESET (PRE) or Clear (CLR)! Yay!, Thanks for all the help by the way!