S/R Latch and Fault

[v1.5]

Hello there.
I am thinking of some kind of fault circuit, but I would like to consult you about whether it is useful or not.
As an example, consider a kind of circuit, and this circuit contains fault detection circuits in various parts. For example; over temperature, humidity, over current / voltage etc. I plan to apply it to the inputs of an S / R Latch IC when any malfunction like these is detected. The outputs of the Latch IC will be interconnected with the OR gate. Thus, in case of any malfunction, whatever malfunction occurs, the S / R latch output will be 1 and the output of the OR gate will also be 1. The output of the OR gate will also be connected to the interrupt pin of a microcontroller, and it will stop the operation of the system safely. The reset of the S / R latch will be provided by the user pressing the button on the card or by an external controller. In this way, the output of the OR gate will be 0 and the microcontroller will control the system again.
Do you think this idea is useful? What would you suggest me?

 

[Nigel Goodwin]

Hello there.
I am thinking of some kind of fault circuit, but I would like to consult you about whether it is useful or not.
As an example, consider a kind of circuit, and this circuit contains fault detection circuits in various parts. For example; over temperature, humidity, over current / voltage etc. I plan to apply it to the inputs of an S / R Latch IC when any malfunction like these is detected. The outputs of the Latch IC will be interconnected with the OR gate. Thus, in case of any malfunction, whatever malfunction occurs, the S / R latch output will be 1 and the output of the OR gate will also be 1. The output of the OR gate will also be connected to the interrupt pin of a microcontroller, and it will stop the operation of the system safely. The reset of the S / R latch will be provided by the user pressing the button on the card or by an external controller. In this way, the output of the OR gate will be 0 and the microcontroller will control the system again.
Do you think this idea is useful? What would you suggest me?

Why the extra chips?, just do it all with the micro.

 

[v1.5]

Why the extra chips?, just do it all with the micro.

you are absolutely right.
Actually, I asked my question by thinking if the microprocessor was not used. That is to say, from the output of Sr latch, any integral controls the enable pin etc.
And another reason is to be able to perform very fast detections without tiring the microprocessor. For example, an integrated chip that I used from my old projects , gave the output signal of short circuit detection in less than 50uS. I used microcontroller for relatively smaller and simpler i / o in that period. Therefore, I thought sr latch would give fast results for this job for this kind of applications.
Is latching errors and waiting for reset from user meanful ? What do you think ?

Thanks.

 

[Nigel Goodwin]

you are absolutely right.
Actually, I asked my question by thinking if the microprocessor was not used. That is to say, from the output of Sr latch, any integral controls the enable pin etc.
And another reason is to be able to perform very fast detections without tiring the microprocessor. For example, an integrated chip that I used from my old projects , gave the output signal of short circuit detection in less than 50uS. I used microcontroller for relatively smaller and simpler i / o in that period. Therefore, I thought sr latch would give fast results for this job for this kind of applications.
Is latching errors and waiting for reset from user meanful ? What do you think ?

Thanks.

Why do you imagine a need to capture events in 50uS? - all the events you're wanting to capture are slow events, and it's a VERY, VERY good idea to check them relatively slowly, and to ignore any brief spikes - otherwise your latch will be permanently giving false detections. If using a latch you would need to add extra circuitry to prevent spurious triggering.

 

[v1.5]

Why do you imagine a need to capture events in 50uS? - all the events you're wanting to capture are slow events, and it's a VERY, VERY good idea to check them relatively slowly, and to ignore any brief spikes - otherwise your latch will be permanently giving false detections. If using a latch you would need to add extra circuitry to prevent spurious triggering.

you are absolutely right.

Well I want to ask another question. How should the input filters for the TTLs to work in a noisy environment? or what should be considered especially for devices that will work in noisy environments? I am experiencing a serious lack of information on this subject. Can you please talk about this a little bit?

 

[Nigel Goodwin]

you are absolutely right.

Well I want to ask another question. How should the input filters for the TTLs to work in a noisy environment? or what should be considered especially for devices that will work in noisy environments? I am experiencing a serious lack of information on this subject. Can you please talk about this a little bit?

It depends exactly what you're doing, and why - but you don't generally want things to trigger if there's a short spike on the supply rails.

When it's done in hardware it's generally done using an electrolytic capacitor, so it takes time while the capacitor charges before it triggers.