Dougy,
COOL! I think I can even follow it. Let me see if I have it straight:
Initially:
* NAND 1 inputs are high (is this a natural event? No matter anyway, since the circuit will be "always on."), and it outputs low.
* NAND 2 then outputs high, latching NAND 1
* The output of 220u is high (and discharged), NAND 3 sees 1/1, and outputs low.
* You press S1
* The 100k/1u are discharged, and take NAND 1 low (the R/C also provide debounce, I think)
* NAND 1 outputs high (and the R/C begin to charge)
* NAND 2 outputs low
* NAND 2 keeps NAND 1 inputs low, as a latch
* The 220u is discharged, and so takes 1 leg of NAND 3 low, and NAND 3 outputs high. A transistor (or opamp) drives a relay.
* The 220u starts to charge through the 10M
* When the 220u gets high enough, NAND 3 sees 1/1, and goes low, shutting off.
* To abort, a second press of S1 takes inputs of NAND 1 high (from 1u, which is charged)
* NAND 1 goes low, driving output of NAND 2 high (which latches NAND 1)
* Input of 220u + charge state of 220u is high (and discharges through D1 -- Schottky?)
* NAND 3 sees 1/1 and outputs low.
It all makes sense!
One remaining question:
* When the unit naturally times out, the FF is still in the "activated" mode, with NAND 1 output high and NAND 2 output low. A press of S1 will "reset" the unit, requiring TWO presses to get it going.
Could this be fixed by splitting NAND 1 inputs, one as shown and one from NAND 3 inverted through NAND 4? I think the "start" and "abort" results will be the same, but when it times out, NAND 3 will output low, NAND 4 will go high, and NAND 1 will see 1/0, so it will output high and the rest is the same as an abort.
Have I read all this right?
Thanks again!
Harry