• Welcome to our site! Electro Tech is an online community (with over 170,000 members) who enjoy talking about and building electronic circuits, projects and gadgets. To participate you need to register. Registration is free. Click here to register now.

PIC18F2431 PCPWM module

Status
Not open for further replies.

Cantafford

Member
00100100;

while(1)
{

}

}
[/code]

And header file.
Code:
// PIC18F2431 Configuration Bit Settings

// 'C' source line config statements

#include <xc.h>

// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.

// CONFIG1H
#pragma config OSC = XT         // Oscillator Selection bits (XT oscillator)
#pragma config FCMEN = OFF      // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = ON        // Internal External Oscillator Switchover bit (Internal External Switchover mode enabled)

// CONFIG2L
#pragma config PWRTEN = OFF     // Power-up Timer Enable bit (PWRT disabled)
#pragma config BOREN = OFF      // Brown-out Reset Enable bits (Brown-out Reset disabled)
// BORV = No Setting

// CONFIG2H
#pragma config WDTEN = OFF      // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))
#pragma config WDPS = 32768     // Watchdog Timer Postscale Select bits (1:32768)
#pragma config WINEN = OFF      // Watchdog Timer Window Enable bit (WDT window disabled)

// CONFIG3L
#pragma config PWMPIN = OFF     // PWM output pins Reset state control (PWM outputs disabled upon Reset (default))
#pragma config LPOL = HIGH      // Low-Side Transistors Polarity (PWM0, 2, 4 and 6 are active-high)
#pragma config HPOL = HIGH      // High-Side Transistors Polarity (PWM1, 3, 5 and 7 are active-high)
#pragma config T1OSCMX = ON     // Timer1 Oscillator MUX (Low-power Timer1 operation when microcontroller is in Sleep mode)

// CONFIG3H
#pragma config MCLRE = OFF      // MCLR Pin Enable bit (Disabled)

// CONFIG4L
#pragma config STVREN = ON      // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
#pragma config LVP = ON         // Low-Voltage ICSP Enable bit (Low-voltage ICSP enabled)

// CONFIG5L
#pragma config CP0 = OFF        // Code Protection bit (Block 0 (000200-000FFFh) not code-protected)
#pragma config CP1 = OFF        // Code Protection bit (Block 1 (001000-001FFF) not code-protected)
#pragma config CP2 = OFF        // Code Protection bit (Block 2 (002000-002FFFh) not code-protected)
#pragma config CP3 = OFF        // Code Protection bit (Block 3 (003000-003FFFh) not code-protected)

// CONFIG5H
#pragma config CPB = OFF        // Boot Block Code Protection bit (Boot Block (000000-0001FFh) not code-protected)
#pragma config CPD = OFF        // Data EEPROM Code Protection bit (Data EEPROM not code-protected)

// CONFIG6L
#pragma config WRT0 = OFF       // Write Protection bit (Block 0 (000200-000FFFh) not write-protected)
#pragma config WRT1 = OFF       // Write Protection bit (Block 1 (001000-001FFF) not write-protected)
#pragma config WRT2 = OFF       // Write Protection bit (Block 2 (002000-002FFFh) not write-protected)
#pragma config WRT3 = OFF       // Write Protection bit (Block 3 (003000-003FFFh) not write-protected)

// CONFIG6H
#pragma config WRTC = OFF       // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
#pragma config WRTB = OFF       // Boot Block Write Protection bit (Boot Block (000000-0001FFh) not write-protected)
#pragma config WRTD = OFF       // Data EEPROM Write Protection bit (Data EEPROM not write-protected)

// CONFIG7L
#pragma config EBTR0 = OFF      // Table Read Protection bit (Block 0 (000200-000FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF      // Table Read Protection bit (Block 1 (001000-001FFF) not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF      // Table Read Protection bit (Block 2 (002000-002FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF      // Table Read Protection bit (Block 3 (003000-003FFFh) not protected from table reads executed in other blocks)

// CONFIG7H
#pragma config EBTRB = OFF      // Boot Block Table Read Protection bit (Boot Block (000000-0001FFh) not protected from table reads executed in other blocks)

#define _XTAL_FREQ 25000000
This code is supposed to send the sequence on the 6 pwm channels(0-5) as if I would be sending the commands with the LATB register(which worked). However the motor does not start at all(the pwm signals are not beiing activated). I must have configured the PCPWM module wrong at some step but I do not realize where. Please help me correct this if possible. Thank you.
 
Last edited:

Daniel Wood

Member
Is that meant to be a sort of H bridge arrangement at the bottom of the schematic?
Shouldn't each line have a complementary pair of transistors (NPN with a PNP)?
 

Ian Rogers

User Extraordinaire
Forum Supporter
Most Helpful Member
Is that meant to be a sort of H bridge arrangement at the bottom of the schematic?
Shouldn't each line have a complementary pair of transistors (NPN with a PNP)?
Ah yes.... We have been here before...
 

Ian Rogers

User Extraordinaire
Forum Supporter
Most Helpful Member
If the motor is 5v then by all means use 4 NPN's but if the motor is driven at 12v the top NPN has no ground ( it has via the motor)... But that means hardly any voltage on the motor.. 5v - 0.6v ( base to emitter ) so around 4v on a 12 volt motor!!! with PNP and NPN you will at least get 10v on the motor...
 

spec

Well-Known Member
Most Helpful Member
You don't give details of the motor, but I would say that a BC182 would be unable to do the job.

spec
 

Cantafford

Member
Cantafford Did you understand my answer in post 9??
I get what you are saying but I thought the only voltage that matters to the motor in this case is the colector to emiter voltage not the one from the base-emiter that is used for turning it on(the trasistor).

I meant 'exactly' to what Ian said about this beiing only a simulation :)

Tell you what I just found out!!!! PWM4 and PWM5 are VERY misleading.... Not the way round you'd imagine..

Bluddy Microchip!!! It seems to work now...
I suppose it has something with those KBI thingies. I'm guessing it's something I need to disable to get them to work as I want to :D. I'm not home now will have a look first thing in the morning.
 

Ian Rogers

User Extraordinaire
Forum Supporter
Most Helpful Member
A ) PWM5 is on RB4 and PWM4 is on RB5 causing the last driver to fault..

B) The pic gives 5v max therefore the top NPN's are going to see only 4.4v at the emitter no matter how big the voltage is..
 

Cantafford

Member
B) The pic gives 5v max therefore the top NPN's are going to see only 4.4v at the emitter no matter how big the voltage is..
That makes sense. But for now for simplicity since I'm just learning to use the PCPWM module I will use NPN's only.

A ) PWM5 is on RB4 and PWM4 is on RB5 causing the last driver to fault..
Wow good eye. I would've never seen that especially since in proteus the model gives PWM4 on RB4 and PWM5 on RB5. In the datasheet however they are reversed. I interchanged pins RB4 and RB5 in proteus and it works fine. Thanks!
 

Cantafford

Member
I have a new problem now. I'm trying to modify the speed of the motor so instead of just turning transistors on and off with the OVDCONS register I now need to send specific duty cycles to each transistor.
 
Last edited:
Status
Not open for further replies.

Latest threads

EE World Online Articles

Loading
Top