in manual it is said that 13+/-0.5William At MyBlueRoom said:1. What is the minimum and maximum VPP?
donno2. are the 16Fxx & 18Fxxx the same VPP voltage?
3. How much current at 13v does the PIC require to be programmed?
Pommie said:1. Manual states Vdd+3.5 to 13.5 (for 16 Series)
2. Nearly. Manual states Vdd+4 to 12.5 (for 18 Series)
Both of the above can be as low as 2V for low voltage programming.
3. Very little on newer chips.
The above is only general and you should check the data sheet. All of the programming specs are available as separate data sheets from microchip.
Mike.
Pommie said:The data sheet for the 18F chips states 300uA for Vpp current and 10mA for Vdd.
Mike.
evandude said:as for "older" chips, I believe that the "F" in the part number implies that a PIC uses FLASH memory, whereas the older type would have a "C", so you might have to find a 16C84 or something to test it out on a high-Vpp-current PIC.
;18F242 9.0-13.25 VDD
;18F248 9.0-13.25 VDD
;18F252 9.0-13.25 VDD
;18F258 9.0-13.25 VDD
;18F442 9.0-13.25 VDD
;18F448 9.0-13.25 VDD
;18F452 9.0-13.25 VDD
;18F458 9.0-13.25 VDD
;18F1230 future?
;18F1330 future?
;18F1220 9.0-13.25 VDD
;18F2220 9.0-13.25 VDD
;18F4220 9.0-13.25 VDD
;18F1320 9.0-13.25 VDD
;18F2320 9.0-13.25 VDD
;18F4320 9.0-13.25 VDD
;18F2331 9.0-13.25 VDD
;18F2431 9.0-13.25 VDD
;18F4331 9.0-13.25 VDD
;18F4431 9.0-13.25 VDD
;18F2221 9.0-12.5 VDD (e)
;18F2321 9.0-12.5 VDD (e)
;18F2410 9.0-12.5 VDD (e)
;18F2420 9.0-12.5 VDD (e)
;18F2450 9.0-12.5 VDD (f) check
;18F2455 9.0-12.5 VDD
;18F2480 9.0-12.5 VDD (e)
;18F2510 9.0-12.5 VDD (e)
;18F2515 9.0-12.5 VDD
;18F2520 9.0-12.5 VDD (e)
;18F2525 9.0-12.5 VDD
;18F2550 9.0-12.5 VDD
;18F2580 9.0-12.5 VDD (e)
;18F2585 9.0-12.5 VDD
;18F2610 9.0-12.5 VDD
;18F2620 9.0-12.5 VDD
;18F2680 9.0-12.5 VDD
;18F4221 9.0-12.5 VDD (e)
;18F4321 9.0-12.5 VDD (e)
;18F4410 9.0-12.5 VDD (e)
;18F4420 9.0-12.5 VDD (e)
;18F4450 9.0-12.5 VDD (f) check
;18F4455 9.0-12.5 VDD
;18F4480 9.0-12.5 VDD (e)
;18F4510 9.0-12.5 VDD (e)
;18F4515 9.0-12.5 VDD
;18F4520 9.0-12.5 VDD (e)
;18F4525 9.0-12.5 VDD
;18F4550 9.0-12.5 VDD
;18F4580 9.0-12.5 VDD (e)
;18F4585 9.0-12.5 VDD
;18F4610 9.0-12.5 VDD
;18F4620 9.0-12.5 VDD
;18F4680 9.0-12.5 VDD
;12F508
;12F509
;12F510
;12F629 (*) 8.5-13.5 VPP
;12F635 10.0-13.0 VPP
;12F675 (*) 8.5-13.5 VPP
;12F683 10.0-13.0 VPP
;
;16F505 ID 12.5-13.5 VDD
;16F506 future?
;16F54 ID 12.5-13.5 VDD
;16F57 ID 12.5-13.5 VDD
;16F59 ID 12.5-13.5 VDD
;16F627 8.5-13.5 VDD
;16F627A 10.0-13.5 VPP
;16F628 8.5-13.5 VDD
;16F628A 10.0-13.5 VPP
;16F630 8.5-13.5 VPP
;16F636 10.0-13.0 VPP
;16F639 10.0-13.0 VPP
;16F648A 10.0-13.5 VPP
;16F676 8.5-13.5 VPP
;16F684 10.0-13.0 VPP
;16F685 10.0-13.0 VPP
;16F687 10.0-13.0 VPP
;16F688 10.0-13.0 VPP
;16F689 10.0-13.0 VPP
;16F690 10.0-13.0 VPP
;16F716 11.0-13.5 VDD
;16F72
;16F73 12.8-13.3 VDD
;16F737 12.8-13.3 VDD
;16F74 12.8-13.3 VDD
;16F747 12.8-13.3 VDD
;16F76 12.8-13.3 VDD
;16F767 12.8-13.3 VDD
;16F77 12.8-13.3 VDD
;16F777 12.8-13.3 VDD
;16F785 10.0-12.0 VDD/VPP
;16F818 8.5-13.5 VDD
;16F819 8.5-13.5 VDD
;16F84A
;16F87 8.5-13.5 VDD
;16F870 8.5-13.5 VDD
;16F871 8.5-13.5 VDD
;16F872 8.5-13.5 VDD
;16F873 8.5-13.5 VDD
;16F873A 8.5-13.5 VDD
;16F874 8.5-13.5 VDD
;16F874A 8.5-13.5 VDD
;16F876 8.5-13.5 VDD
;16F876A 8.5-13.5 VDD
;16F877 8.5-13.5 VDD
;16F877A 8.5-13.5 VDD
;16F88 8.5-13.5 VDD
;16F913 10.0-12.0 VDD/VPP
;16F914 10.0-12.0 VDD/VPP
;16F916 10.0-12.0 VDD/VPP
;16F917 10.0-12.0 VDD/VPP
;16F946
I've run across devices that would only go into high voltage program/verify mode using the "VPP first" method (using programming hardware and software of my own design).Nigel Goodwin said:To 'clarify' this a little bit more?, I've never found a PIC yet that requires Vpp first - the reason behind it being in the specs is that is you apply Vdd first then the oscillator might start BEFORE you can rise Vpp to access programming mode. As long as you apply Vpp VERY shortly after Vdd, then it works fine - exactly the same as other PIC's.
Mike said:I've run across devices that would only go into high voltage program/verify mode using the "VPP first" method (using programming hardware and software of my own design).
I recall experimenting for several days (long ago in Dec' 2004) trying to come up with a single 'compromise' method that would work with the twenty or so different devices I had on hand but "no joy" and so I finally added a "vpp method" flag bit to the device tables because using the correct method always worked. Perhaps it had something to do with my hardware/software designs or the particular devices I was testing.
I remember you mentioning this a year or more ago too. At that time I went to your web site, downloaded your programming software, and then realized it only supported a few legacy "F" series devices (something like seven 'flash' devices total at that time? I don't recall exactly).
I'd love to hear comments from other chaps who have designed programming hardware and/or software that supports 12F/16F parts with the "VPP first" specification. Which method are you using? How many of the 12F/16F parts with the "VPP first" specification have you tested?
For reference, I've built three programmers using hardware similar to that below (16F88, 18F258, and 18F2320 versions).
Yes, the "VDD first" method can be a problem when a target device has been configured with INTOSC enabled and MCLR disabled.Nigel Goodwin said:To 'clarify' this a little bit more?, I've never found a PIC yet that requires Vpp first - the reason behind it being in the specs is that is you apply Vdd first then the oscillator might start BEFORE you can rise Vpp to access programming mode. As long as you apply Vpp VERY shortly after Vdd, then it works fine - exactly the same as other PIC's.
Happy to see you're supporting more devices but, gosh, that's still a puny list. Where are the 18F' devices from the DS39622F spec' (34 devices including the '2320, '2420, '2520, '2620, '4520, '4620, etc.)?Nigel Goodwin said:The supported devices list is at , the asterisked ones are in the latest beta, they all work - but 18F support is somewhat flakey so far (problems with config fuses). But all switch to programming mode fine.
I have not released the design. I built it to help the folks at melabs find a problem on their serial programmer. The VDD and VPP drivers are virtually identical to theirs and I was able to help them by finding an error in the DS39622 document that prevented '2620 and other devices from erasing properly.Looks nice, do you have it released on a website?.
I'm controlling the VDD and VPP switching in firmware on the programmer with 200-nsec resolution. Much finer control than I suspect you have by setting or clearing bits on the parallel port from a PC app'.I don't see any reason for your problem with Vdd first?, unless you're sending seperate RS232 messages to do the switching?, that would probably be too slow for devices with internal oscillators?.
Mike said:Happy to see you're supporting more devices but, gosh, that's still a puny list. Where are the 18F' devices from the DS39622F spec' (34 devices including the '2320, '2420, '2520, '2620, '4520, '4620, etc.)?
You can program all 18F' devices with a very narrow set of algorithms compared to the 12F/16F parts. The 34 devices in the DS39622F spec' simply require a new "bulk erase/chip erase" algorithm. Other than that, they use the same read/write/verify algorithms based on an N-byte (up to 64 byte) device dependent "write buffer size" buffer. You need three different "bulk erase/chip erase" algorithms (two if you don't need to support the ******* XX39 devices). A single algorithm for writing data eeprom works for all three variations listed across all the programming specifications. And a single variable N-byte "write" algoritm works for all 18F' devices.
I'd be happy to share/compare notes if you're interested in expanding 18F' support.
I have not released the design. I built it to help the folks at melabs find a problem on their serial programmer. The VDD and VPP drivers are virtually identical to theirs and I was able to help them by finding an error in the DS39622 document that prevented '2620 and other devices from erasing properly.
I'm controlling the VDD and VPP switching in firmware on the programmer with 200-nsec resolution. Much finer control than I suspect you have by setting or clearing bits on the parallel port from a PC app'.
Perhaps you're "lucky" or you just don't have experience with devices that truly require the "VPP first" method. Or, perhaps there's a problem with my hardware/firmware/software. Time will tell and I'll certainly come back here with apologies when/if I find a problem (grin). Meanwhile, I'm going to assume there's a reason for the spec', since that's the only way if works on some devices for me.
Please pick one; (A) No real standards I'm aware of. Or, (B) Everyone has their own standard (grin).William At MyBlueRoom said:Mike, in your schematic the ICP pinout is from top to bottom
GND
PGC
PGD
VDD
VPP
I use
VPP
VDD
GND
PGD
PGC
Is there a standard you know of?
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