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parallel-to-serial problem

earckens

Active Member
A pcb for 24 inputs and 48 outputs (using serial-to-parallel and parallel to serial 8-bit registers) is working flawless with its controller program.

Now I also designed a 72 inputs (72IN) board using 9 8-bits paralle-to-serial-8-bit registers based on the pcb 24IN/48OUT concept.

I adjusted the program accordingly yet this does not work. To prove that my program is ok I modified that program to work on the 24IN/48OUT pcb, only reading the inputs: that works well.
I then tested my modified program on the 72IN pcb and again not working (not reading the 24 first inputs).

So to me that proves there is an issue with the hardware of the 72IN , and/or its combination with my 72IN program.

Attached are the schematics for the 24IN/48OUT pcb and the 72IN pcb. I am at my wits end (cannot see the forrest through the trees) about this so I decied to post my question on this forum.
Please have a thorough look at my schematics, and any pointers, hints, .. are welcome.
Erik

Below here is my code for the reading of 24 inputs ony:
(EDIT: which does work on the 24IN/48OUT pcb but not on the 72IN pcb)

C++:
#include <Auto485.h>
#include <CMRI.h>
#include <SPI.h>
#define CMRI_ADDR 0                       // select the CMRI node address
#define DE_PIN 2                          // Arduino pin 2 -> MAX485 DE and RE pins
#define NOP __asm__ __volatile__ ("nop\n\t") // https://forum.arduino.cc/t/very-short-delays/43445/5
#define input_groups 3                    // each group = 8 input bits; if 72 inputs then = 9
// pin 74HC165
const byte LATCH_165 = 9; // LATCH pin
Auto485 bus(DE_PIN);                      // RS485 bus transceiver
CMRI cmri(CMRI_ADDR, 24, 0, bus);       // sets up an SMINI with address 5, SMINI = 72 inputs, 0 outputs
uint8_t input_state[3];

void setup() {
  Serial.begin(9600);
  delay(100);
  Serial.println(__FILE__);
  Serial.println("DCCpp_CMRI_nopxor72-in_v5.ino");
  Serial.print("C/MRI address : ");
  Serial.println(CMRI_ADDR);
  delay(1000);
  bus.begin(57600, SERIAL_8N2);           // open the RS485 bus at 57600bps
  SPI.begin ();                           // serial data protocol used to control 74HC165
  pinMode(LATCH_165, OUTPUT);
  digitalWrite (LATCH_165, HIGH);

  // initialize last_input_state array with current input state
  digitalWrite(LATCH_165, LOW);              // pulse the parallel load latch
  delay(1); // wait while data loads
  digitalWrite(LATCH_165, HIGH);
  input_state[0] = ~(SPI.transfer(0));
  input_state[1] = ~(SPI.transfer(0));
  input_state[2] = ~(SPI.transfer(0));
}

void loop() {
  // 1: main processing node of cmri library
  cmri.process();

  // 2: update inputs
  digitalWrite (LATCH_165, LOW);          // pulse the parallel load latch
  NOP;                                    // use the macro instead of inline assembly
  NOP;
  digitalWrite (LATCH_165, HIGH);
  byte new_input_state[3];
  new_input_state[0] = ~(SPI.transfer(0));
  new_input_state[1] = ~(SPI.transfer(0));
  new_input_state[2] = ~(SPI.transfer(0));
 
  if (memcmp(new_input_state, input_state, 3) != 0) {
    memcpy(input_state, new_input_state, 3);
    cmri.set_byte(0, new_input_state[0]);
    cmri.set_byte(1, new_input_state[1]);
    cmri.set_byte(2, new_input_state[2]);
   }

  // 4: wait for next iteration
  delay(1);
 }
 

Attachments

  • CMRI_24IN_48OUT_Pro_SMD_v7.pdf
    52.6 KB · Views: 17
  • CMRI_SMD_72IN_Pro_v2.pdf
    53.1 KB · Views: 18
Could it just be higher capacitive loading on the shift/load signal? Try adding a few extra NOPs to extend it.

Also, set alternating values on all the input pins and monitor each IC serial in, out and control pins with a scope, triggered from the load pulse.

That should prove whether the hardware is OK or not?
 
How do you suggest I set alternating input values?
Just ground alternate inputs, so the serial data should give alternating high/low if it's correctly loading and transferring the inputs.

Pins 9 & 10 to view the data stream ay each IC, plus checking 1, 2 & 15 for appropriate signals or levels.
 
Hi "jrw", I added 3x nop. And scope to pin 9 shows its level stuck at +/- 3V .. No pulsing visible. On the good board (24IN/48OUT) all is ok.
I may probably remove one by one the 74HC165; I suspect one of them is defect?
 
1748026835228.png
 
For future work consider an alternative. Here is a single chip solution for 64 bits SIPO shift
reg. Was done with simple verilog code and chip resources. The status regs shown not
needed if you dont need to see at any point in time whats in the SR (given the fact you
loaded it). Note in first window on right all the other stuff in chip (the catalog you drag
and drop from), and the resources used/left after design built, right hand window.

1748030011925.png


The other stuff on chip, multiple copies in most cases, looks like -

1748029153997.png


Compiler and tool (PSOC Creator) free, board to try (but not enough I/O) ~ $15, CY8CKIT-059. Bigger
board more like $100.

I think the entire first design could have been done in just the one chip.

The resources shown above have been augmented by users creating their own components
thru schematic capture and/or Verilog. Stuff like Cordic, DDS32, 74HC MSI parts..... This is
feature of the onchip fabric user programmable. You can add these libs to the tool so
they become like rest of components, drag and drop.

All the resources have their own API lib you cut and paste into your code, rare you ever write a
driver, just use the f() calls to manipulate the resources used. Very rapid development.

Folks have done single chip oscilloscopes with it, I have done bursting signal generator, there
are sites with 100's of projects one can draw from, besides the tool projects also available to
draw from.


Regards, Dana.
 

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