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Opamp current regulator suffers overshoot in led current

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Flyback

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Hello,
The two current regulators here try to keep the LED current from overshooting too much each time the LED voltage supply turns back ON.
The one with the zener diode has the advantage that its opamp’s output voltage never gets railed high, and so it should offer less overshoot in the LED current when the LED supply voltage comes back on, however, its overshoot is just as bad as the other one, whose output does rail high.
Why is this?
Ie, Why does the opamp whose output gets railed high not incur greater led current overshoot than the other one?
I mean, when the opamp output rails high, the opamp’s output stage goes into saturation, and so it should take more time to bring its output down from the high rail? (and thus incur greater overshoot in the led current when the LED supply voltage comes back on)

LTSpice sim and pdf schem attached
 

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  • Current regulators with pulsed LED voltage.pdf
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Here is the output voltage of the slow op-amp LT1006. The voltage drops at 0.4V/us exactly what the data sheet said. (with a 10pF cap from out to (-)) It is a little slower with 100pF.
1551621066212.png

What you have here is V2 that can go from 0 to 24V in 1uS. Which is very fast.
With V2=0V the op-amp output is at 7V pulling up as hard as it can. When V2 jumps up to 24 V it takes time for the op-amp to drop its output to 4.8V.

1551621109884.png

What to do? You could change V2 to 5uS rise/fall time. OR You can pulse V3 to turn on/off the MOSFET.
ron,
 
Thanks Ron,

Yes I certainly agree, the thing is, is it not a surprise to yourself that the opamp in the other circuit, which has a zener connected so as to stop its output getting railed, overhsoots just as much?

I thought that when an opamp gets railed high, its output kind of "sticks" there, kind of like minority charge carriers have to get dispersed before it can start to come back down off the rail, and this takes time...but this doesnt seem to be the case here in this simulation.......would it be the case in real life?
 
Why is this?
With all component values exactly as per your post #1 asc file, both FETs have the same Vgs so give the same result. If you reduce V1 (currently 7.75V, not 7.2V), that will reduce Vgs for M1 and hence reduce the current spike.
 
yes, thanks, and sorry for the mistake, it is meant to be 7.75v not 7.2v (ive corrected it above now..thankyou so much!)
The question is, in the case of those circuits, which one would you expect to see the most overshoot?

Bascially i am asking if having the opamps output go to the rail, does this make it slower.?..ie, do opamp outputs tend to "stick" to the rail?...and need extra time to come off of it.?
 
0.4v/us slew rate is typical. 0.25V/us is slowest. I noticed you can speed it up by using pin 8.
I think you should live with it. OR Find a different way to turn on/off the current. OR Add a faster current limit. OR at least stop using the RDSon of M1 as the limiting function.
1551625522158.png

Here Q1 is faster, and limits the current to 1.5A until the amp gets around to doing it at 1.0A.
(note I changed V3 & R1)
 
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