need help to understand tis circuit

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aruna1

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this is the circuit of JDM programmer.
I'm trying to understand how Q2 works here.coz only base of Q2 get a voltage and emitter or collector is not connected to power supply,

there is a description about this circuit,but I cant understand that description.

here is the circuit
**broken link removed**

and this is the description
**broken link removed**
 

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It's a bidirectional level translator. Assuming DTR is high: If the PIC pulls the data line (the emitter of Q2) low to -5V, the base-emitter is forward biased and the collector is pulled down to ~-5V also. If the PIC doesn't pull the emitter low (-5V), or sets it high (0V), then there is no bias for the transistor and it won't be conducting and the collector voltage will be set by DTR.

If DTR is low, the transistor base-collector is forward biased, and the emitter is pulled low.
 
i dont think PIC can produse negative voltages
 
aruna1 said:
i dont think PIC can produse negative voltages
Click to expand...
Well this must be a magic PIC. You'll note that the PIC vdd is GND (0V). Vss is -5.1V. So in this setup it will be hard for the PIC to produce positive voltages.
 
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