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# need help to understand tis circuit

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#### aruna1

##### Member
this is the circuit of JDM programmer.
I'm trying to understand how Q2 works here.coz only base of Q2 get a voltage and emitter or collector is not connected to power supply,

here is the circuit

and this is the description

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It's a bidirectional level translator. Assuming DTR is high: If the PIC pulls the data line (the emitter of Q2) low to -5V, the base-emitter is forward biased and the collector is pulled down to ~-5V also. If the PIC doesn't pull the emitter low (-5V), or sets it high (0V), then there is no bias for the transistor and it won't be conducting and the collector voltage will be set by DTR.

If DTR is low, the transistor base-collector is forward biased, and the emitter is pulled low.

It's a bidirectional level translator. Assuming DTR is high: If the PIC pulls the data line (the emitter of Q2) low to -5V, the base-emitter is forward biased and the collector is pulled down to ~-5V also. If the PIC doesn't pull the emitter low (-5V), or sets it high (0V), then there is no bias for the transistor and it won't be conducting and the collector voltage will be set by DTR.

If DTR is low, the transistor base-collector is forward biased, and the emitter is pulled low.
i dont think PIC can produse negative voltages

i dont think PIC can produse negative voltages
Well this must be a magic PIC. You'll note that the PIC vdd is GND (0V). Vss is -5.1V. So in this setup it will be hard for the PIC to produce positive voltages.

in this setup it uses negative voltage to make voltage double

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