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Need advice on a rising and falling edge sensor circuit

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hlstahl

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Hi.

I am trying to build a CMOS device that will sense rising and falling edges, and produce one of two clear digital 'blips'. I want it to differentiate rising and falling, to have its own power source, and to be able to sense voltages up to 250 ac, or at least 40vdc, but show a high impedance to the signal.

I have built more than a few purely digital circuits: timer and counting and logic based gadgets, but seem to get into trouble when I try to use comparator or op-amps.

Any suggestions would be helpful.

I asked this once before and got one response suggesting I try to find a 'test probe' circuit, but they seem to be aimed at ttl circuits, and the thread seems to have disappeared - or I cannot find it.
 
One way to differentiate between rising and falling edges is, oddly enough, to use a differentiator. This can consist of a capacitor at the input to the inverting input of an op amp with a feedback resistor from the output to the inverting input (non-inverting input to ground). Add diode clamps in the feedback to give a square-wave type output (see attached for an example operating with a 10VAC 60Hz input). The output is positive for a negative slope, negative for a positive slope, and 0V for no signal.

A larger feedback resistor will sharpen the square-wave edges.

To increase the input impedance you can use a buffer op amp (non-inverting gain of one) to drive the differentiator input.
View attachment Differentiator.doc

Edit: For proper operation, a small resistor (≈1kΩ) should be added in series with the input capacitor on the op amp.
 
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I'm not sure about the 240VAC or 40Vdc part, but the CMOS part is an "edge detector".

Ken
 

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I'm not sure about the 240VAC or 40Vdc part, but the CMOS part is an "edge detector".

Ken
That circuit will not differentiate between rising and falling edges, which he requested.
 
"Crutschow"

Thank you. I need to build this to 'watch it' work. I will likely get back to you then.

i do not understand the use of the parallel and opposing diodes in the feedback loop in the circuit diagram you sent, except to create a fixed voltage across them in either direction. And then I don't understand what that would do. But the schematic is clear enough.

hlstahl
 
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The diodes clamp the output to about ±0.7V. Otherwise the op amp will go to it's maximum output and saturate which will greatly slow its response time.

If you want to simulate the circuit, which is much easier than building it, use a simulation program like LTSpice from Linear Technology, which is free.
 
Attached is a CMOS logic version. The input level is for 4000 series logic, so naturally, your input voltage levels will have to attenuated accordingly. One output provides a positive pulse when a positive edge is detected, and the other output provides a positive pulse when a negative edge is detected. The gates are schmitt trigger types.
 

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That circuit will not differentiate between rising and falling edges, which he requested.

hi Carl,

Ken's 4077 circuit works OK for giving an output pulse on rise/falling edges and is commonly used in encoder circuits.

The pulse width is set by the 10K/100nF, the pulse Tcr period, needs to be less than the driving pulse width
 
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I misinterpreted their: "I want it to differentiate rising and falling" as differentiating as in an RC network. :(

ken
 
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