NE555 discharge current

[ericgibbs]

hi Al,
This is a clip from the National LM555 d/s.

 

[jpanhalt]

The LM555 data sheet says, "The output pin can source or sink 200ma".
That data sheet also shows the discharge pin going as high at 100ma with around 1v sat voltage.

1) Output sink ability wasn't the question.
2) We don't know the sat voltage being used. But neither chart (later posted by Eric) goes above 100 mA. 200 mA at 2.5 sat voltage is "off the chart." In fact, at 5V, the max shown is in accord with the NXP chip.
3) This question was about the NE555, not the LM555. The LM555, while interesting, is off topic, as are the CMOS versions.

Now, I am not saying the NE555 cannot sink 200 mA at the discharge pin. What I am saying to those who claim it can is quite simple. That claim contradicts the manufacturer's datasheet. It contradicts what the manufacturer states about the internal design of the chip. Just show us what you did so the claim can be tested and verified. That is a simple principle applied across science and technology. If you do have data (with the test circuit used) to support that claim -- particularly any data showing long-term stability, heating, and failure rate at the claimed power -- just post it. Again, this thread is about the NE555.

Regards,

John

 

[audioguru]

1) Output sink ability wasn't the question.
2) We don't know the sat voltage being used. But neither chart (later posted by Eric) goes above 100 mA. 200 mA at 2.5 sat voltage is "off the chart."

No, you are mixed up.
MrAl said The output pin which is pin 3, not the discharge pin which is pin 7.

3) This question was about the NE555, not the LM555. The LM555, while interesting, is off topic, as are the CMOS versions.

No.
The LM555 is the same as an NE555. An LMC555 is a Cmos 555.

 

[jpanhalt]

No.
The LM555 is the same as an NE555. An LMC555 is a Cmos 555.

National LM555 Datasheet:
https://www.electro-tech-online.com/custompdfs/2011/11/LM555-1.pdf

Philips NE555 Datasheet:
https://www.electro-tech-online.com/custompdfs/2011/11/NE_SA_SE555_C_2.pdf

The schematics are not the same.

John

 

[4pyros]

National LM555 Datasheet:
https://www.electro-tech-online.com/custompdfs/2011/11/LM555-2.pdf

Philips NE555 Datasheet:
https://www.electro-tech-online.com/custompdfs/2011/11/NE_SA_SE555_C_2-1.pdf

The schematics are not the same.

John

Pin 7 stuff looks the same to me, but the schematic has no bearing on what the discharge transistor can handle. Why dont you test it yourself instead of insisting others do it for you.

 

[audioguru]

The datasheet for the newer LM555 says "Direct replacement for SE555/NE555" which are much older. Then they work the same and have the same spec's.

 

[MrAl]

1) Output sink ability wasn't the question.
2) We don't know the sat voltage being used. But neither chart (later posted by Eric) goes above 100 mA. 200 mA at 2.5 sat voltage is "off the chart." In fact, at 5V, the max shown is in accord with the NXP chip.
3) This question was about the NE555, not the LM555. The LM555, while interesting, is off topic, as are the CMOS versions.

Now, I am not saying the NE555 cannot sink 200 mA at the discharge pin. What I am saying to those who claim it can is quite simple. That claim contradicts the manufacturer's datasheet. It contradicts what the manufacturer states about the internal design of the chip. Just show us what you did so the claim can be tested and verified. That is a simple principle applied across science and technology. If you do have data (with the test circuit used) to support that claim -- particularly any data showing long-term stability, heating, and failure rate at the claimed power -- just post it. Again, this thread is about the NE555.

Regards,

John

What dont you understand about the pin 7 current limited only by the package power dissipation?
What the data sheet tells us is that you dont have to limit the current through the discharge pin, the internal drive/gain will take care of that. The only thing you have to worry about is the saturation voltage and the actual current you obtain. If you do have 100ma through the discharge pin then you dont want 10v saturation or else the package will overheat.
You have to realize that the discharge pin has built in overcurrent protection, but not any built in overpower protection. That's the bottom line.

If you are, on the other hand, looking for low saturation voltage at the discharge pin, then you have to think about limiting the current yourself by design. That's not the same as the max current the transistor can handle. These two specs are different. I think what you are after is a low saturation voltage with some decent current through the discharge pin, which you might not be able to obtain, but you wont burn up the transistor no matter what you do unless you allow it to overheat due to a combination of current and saturation voltage.
You have to also realize that when they designed this thing they made it so that you can connect a largish capacitor right to the discharge pin and the other end to ground. If the discharge pin did not have current protection built in it would burn out on the first cycle pulse the first time it was turned on.

If you look at the schematic, you'll see the discharge transistor driven with a 100 ohm resistor while the output sinking transistor is driven with a 120 ohm resistor. Not much difference, with the discharge transistor being driving just a little harder.

 

[jpanhalt]

What dont you understand about the pin 7 current limited only by the package power dissipation?

Please try to keep this professional.

I have clearly stated what Philips says about pin7 in the NE555, which differs from what is said about the LM555 in National's datasheet for the LM555. However, if you look at the Fairchild datasheet (https://www.electro-tech-online.com/custompdfs/2011/11/LM555-3.pdf) , you will find a calculation showing the effect of discharge sink capability. In most circuits, it has negligible effect, because external resistance (Ra and Rb) swamp its effect to limit discharge rate. But, it might cause timing differences in circuits where current limiting to 50 mA vs. 200 mA came into play, e.g., if the external resistance is small.

If you are, on the other hand, looking for low saturation voltage at the discharge pin, then you have to think about limiting the current yourself by design. That's not the same as the max current the transistor can handle. These two specs are different. I think what you are after is a low saturation voltage with some decent current through the discharge pin, which you might not be able to obtain, but you wont burn up the transistor no matter what you do unless you allow it to overheat due to a combination of current and saturation voltage.
You have to also realize that when they designed this thing they made it so that you can connect a largish capacitor right to the discharge pin and the other end to ground. If the discharge pin did not have current protection built in it would burn out on the first cycle pulse the first time it was turned on.

Yes, the datasheet says it is current limited. See my first post in this thread (Post#2). I have no reason to doubt the Philips datasheet for the NE555. You apparently do, based on the National datasheet for the LM555 and your own data, which you for some reason won't show.

John

 

[MrAl]

Please try to keep this professional.

I have clearly stated what Philips says about pin7 in the NE555, which differs from what is said about the LM555 in National's datasheet for the LM555. However, if you look at the Fairchild datasheet (https://www.electro-tech-online.com/custompdfs/2011/11/LM555-4.pdf) , you will find a calculation showing the effect of discharge sink capability. In most circuits, it has negligible effect, because external resistance (Ra and Rb) swamp its effect to limit discharge rate. But, it might cause timing differences in circuits where current limiting to 50 mA vs. 200 mA came into play, e.g., if the external resistance is small.



Yes, the datasheet says it is current limited. See my first post in this thread (Post#2). I have no reason to doubt the Philips datasheet for the NE555. You apparently do, based on the National datasheet for the LM555 and your own data, which you for some reason won't show.

John

Hello again,

I asked you a simple question, what is not 'professional' about that?

It appears that you are after a different kind of spec here. You're not that interested in knowing what can blow the transistor out as much as how well it will perform when used in an application within its limits. The information i supplied says that the transistor wont blow out, that's all. It doesnt say how well it will perform as a shunt device when used in a normal circuit. That's about all i can tell you right now because i dont see any other data anywhere that is going to tell me that if i use a 100uf cap how fast it is going to discharge due to the internal current limiting action of the discharge transistor, or at least not to any exacting specs.
However, from the LM555 data sheet we can see that for 80ma the sat voltage is about 1v (roughly). That says that the internal R at that point is 1/0.08 which is 12.5 ohms. This sounds like something they didnt want to spec too closely though, and it's even hard to judge the repeatability. It most likely has a lot to do with the beta of the transistor and possibly other factors.

The best we can do seems to be to go over the analysis for a particular application and see what effect larger or smaller resistances will have here.

What is your end application going to be that uses a 555?

 

[Tilamsik]

Have somebody tried used output pin 3 as discharge and use pin7 as open collector output. This might help the NE555 sink current in question.

 

[MrAl]

Hi,

I think someone tried tying the output pin to pin 7 to get higher discharge current.

If i knew the application i might be able to recommend something.

 

[alec_t]

If i knew the application i might be able to recommend something.

Thanks, MrAl, but my original post was just seeking design knowledge, with no particular application in mind. A designer might wish to know, for example, if discharging a 1 Farad cap without using an external current-limiting resistor was feasible/safe, or how much time has to be allowed for a cap to discharge before a monostable can be re-triggered.

 

[Tilamsik]

Thanks, MrAl, but my original post was just seeking design knowledge, with no particular application in mind. A designer might wish to know, for example, if discharging a 1 Farad cap without using an external current-limiting resistor was feasible/safe, or how much time has to be allowed for a cap to discharge before a monostable can be re-triggered.

Threshold input or pin 6 was connected to the base of Q1 of NE555 and no internal resistor connected to the base. Please see schematic diagram of NE555. You need a resistor as charging current path to flow for charge timing capacitor. This is the reason we have RC on Timing formula of NE555.

 

[Sceadwian]

Thanks, MrAl, but my original post was just seeking design knowledge, with no particular application in mind.

You can't design for 'no particular application in mind' if it's not something practical to a specific application then seeking the knowledge itself is pointless except for possibly being a McGuyver'esc trick to use when you don't have the proper components on hand to current bypass a 555 properly.

You're spinning your wheels with no actual goal.

 

[MrAl]

Thanks, MrAl, but my original post was just seeking design knowledge, with no particular application in mind. A designer might wish to know, for example, if discharging a 1 Farad cap without using an external current-limiting resistor was feasible/safe, or how much time has to be allowed for a cap to discharge before a monostable can be re-triggered.

Hi there alec,

Oh ok, that's more like it Now i have a much better idea what kind of information you are after. It appears you want to know the longevity of the 555 ic when subject to a large cap where it is questionable whether or not it's going to survive. That's a very valid question.

This really involves at least two things...

When we look at the data sheet we see that they do show some specs for the current, and they do show about 80ma at 1v for the discharge pin. What they dont show is the absolute current level limit. I dont know if they actually could spec the chip like this because it probably varies a bit from chip to chip and also with temperature due to the way bipolar transistors work with attention to the beta variations. This means one chip might draw 100ma and the other 150ma. It's very hard to put an exact number on this because of the possible variations. This in turn means it would be hard to determine how long a 1F cap would take to discharge down to say 0.1 volts when it starts out at say 15 volts.

What we can turn to is the power heating and see if that helps.
At 15 volts and 100ma that would be 1.5 watts, which would cook even the best package type i think if it ran for a long time that way. It only discharges for a limited time however, so we have to look at that.

With 1F and 100ma
dv=i*dt/C
dv=0.1*dt/1
dv=0.1*dt
15=0.1*dt
dt=150 seconds.

Thus it would take 150 seconds to discharge the 1F cap at 100ma.

So the question then becomes, would the package overheat in 150 seconds? It's hard to say without knowing the thermal time constant. I guess we could estimate that, but for now lets assume that it wont overheat in 150 seconds because the average power is about 0.75 watts over that time interval, and we wont retrigger until we force the average power down to 300mw. 300mw is chosen based on the thermal resistance of the 8 pin plastic package and the fact 600mw will cause a temperature rise of about 80 deg C, and we have to limit to a package rated at 70 deg C max.

So given the 1.5/2=0.75 watts and the target limit of 0.3 watts, we get the duty cycle of 0.3/0.75 which equals 0.4, or 40 percent. This means that since it takes 150 seconds to discharge we can not retrigger again until 225 seconds later, for a total cycle time of 375 seconds.

Now that was for 100ma, but if it draws 200ma that means we discharge in 75 seconds. This means at first it appears that we can retrigger 112.5 seconds later, for a total cycle time of 187.5 seconds.
However, the power increased to an average of 1.5 watts over the discharge time period, meaning now we have to limit to 0.3/1.5=0.2 or 20 percent duty cycle. This brings us back to a 375 second cycle time, even though we discharge faster now.


You might start to see the differences here and the similarities.

So in the end we end up with a little formula:
cycle time tc=C*Vcc^2/(2*0.3)

Of course this assumes that there is no significant dissipation caused by any of the other pins, especially the output pin. If there is, then that has to be subtracted from the 0.3 above:
cycle time tc=C*Vcc^2/(2*(0.3-Pd))
where Pd would be the output pin power, subject to a limit of less than 0.3 watts.

I think this now explains how the limitations of pin 7 come into play through the power dissipation of the chip.

Personally though i dont think i would use a cap as large as 1F.
Also, as i noted before, i had trouble with as little as 22uf but i didnt look into this too well to see if it was a chip defect or what.

The standard data sheet seems to indicate a max capacitance of 100uf. The more advanced versions go up to 10000uf.

Also interesting, the Texas Instruments version TLC555 (CMOS) states 150ma output OR discharge current limit as an absolute max for the chip. They also give some data for the discharge switch resistance vs supply voltage and temperature.

 

[audioguru]

Also interesting, the Texas Instruments version TL555 (CMOS) states 150ma output OR discharge current limit as an absolute max for the chip. They also give some data for the discharge switch resistance vs supply voltage and temperature.

Typo error.
The TLC555 is the Cmos version.

 

[alec_t]

Thanks for that analysis MrAl.

 

[MrAl]

Thanks for that analysis MrAl.

Hi alec,

You're welcome, and i hope it helps you with some project in the future.

Personally i usually dont need to use a 555 for anything. Last time i needed a long delay i used a small 8 pin micro controller because it can be programmed for much longer delays without using large capacitors or high value resistors.