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NE555 discharge current

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alec_t

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I've studied the datasheet but can't find any mention of the maximum current the 555's Discharge transistor can handle. Presumably it's "enough", but it would be nice to have a numeric value, or at least a guide as to the maximum capacitor value it can safely discharge. Anyone know?
 
The LM555 can source or sink 200 mA. I have always assumed the NE555 was the same.

John

Never mind. I am now looking for the discharge rating in a more extensive application note I have. Sorry to have misread the question.

Edit:

Source: AN170 (obsolete)
The discharge transistor, Q14, is current-limited at 35mA to 55mA internally.

Why NXP/Philips got rid of that application note amazes me. Here's a ling to that Application Note: https://www.electro-tech-online.com/attachments/555an-pdf.52952/

John
 
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Thanks for the info and link, John. Yes, a strange decision to drop an app note for a still much-used product.
 
The discharge pin can handle about 200mA. In fact you can parallel the discharge pin with the output pin to improve the sinking of the chip.
 
That seems to conflict with the manufacturer's specification. How did you determine that value? How many did you test?

John
 
By using pin 7 in-place of the output pin, the collector-emitter voltage was measured and conformed to a capability of 200mA sinking current.
 
Please show your circuit. I don't understand what you mean by using pin 7 instead of pin 3...i.e., for what? How can measuring a voltage at an open collector can tell you the current capability of the transistor. Do you have any data you can share? I am sure Philips had some data on which to base its claim.

John
 
Simply use pin 7 to sink a load instead, or as well as, pin 3.
Here's a circuit from my highly popular 555 eBook:

IMPROVING THE SINKING OF A 555
The output of a 555 goes low to deliver current to a load connected as shown in the circuit below. But when the chip is sinking 200mA, pin 3 has about 1.9v on it. This means the chip does not provide full rail voltage to the load.
This can be improved by connecting pin 7 to pin 3. Pin 7 has a transistor that connects it to 0v rail at the same time when pin 3 is LOW. They can both be connected together to improve sinking capability. In this case the low will be 800mV for 200mA instead of 1900mV, an improvement of 1100mV. This will add 1v1 to the load and also make the chip run cooler.


**broken link removed**
 
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Simply use pin 7 to sink a load instead of pin 3.
That's the theory. Have you actually tried it? I've only got one 555 left in my spares box and am not willing to test it to destruction :)
 
@colin55,

I understand your claim. What I am asking for is the data that it can sink 200 mA. According to NE555's manufacturer, Pin 7 is internally limited to about one-forth of that amount. You could call it the Missouri amendment to the US motto, "all else show me."

John
 
If you look at the 555 circuit, you see the discharge transistor has no limiting on it.


**broken link removed**
 
That doesn't answer my question as to whether you've actually measured the discharge current capability, but I see where you're coming from. As I found, current limiting isn't explicit in the schematic, but if the chip maker says (in the app note) the current is internally limited to 35-55mA I'm prepared to accept their word. R16 and the Q25 conductance (unknown, may be low due to the manufacturing process) obviously control base current to Q14, so if Q14 is fabricated with a low beta then its collector current may well be implicitly limited.

Edit: IIRC I've seen datasheets with weasel words such as "This schematic is illustrative only" or "representational". Manufacturers don't always want the competition to know the full details of their products. This may be a case in point. On the other hand, if the app note contained an error regarding the current limit then perhaps that's why it was withdrawn ;-)
 
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@Colin55,

I know you take a rigorous approach to electronics on your site and are known to take others to task for what you consider sloppy work or oversights. Asking for your data is simply in line with that level of discipline.

Now as to Q14, the Philips schematic (see previous link) has different values than Tony's. Perhaps, you can agree to use the manufacturer's schematic to avoid confusion. I also see that there are various ways in which the base current to Q14 can be affected in the circuit. Hence, I see no reason to doubt Philips' assertion. The burden of proof to dispute that claim, I believe, is on you.

John
 
If you look at the 555 circuit, you see the discharge transistor has no limiting on it.
Like any transistor, its output current is limited by its base current which is limited by a resistor and is limited by its current gain.

The Philips applications note says that Philips introduced the 555. No they didn't. Signetics invented it then was bought by Philips a few years later.
 
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Hi,


The 555's vary a bit, but the standard version can handle 200ma or more. There are however a couple of catches to that spec so it doesnt stand alone. At least two other things must be considered along with that number.

Number 1:
The saturation voltage may be as high as 2.5v with a 15v supply with 200ma sink current.

Number 2:
The pin 7 current does not need to be limited as long as the package dissipation is not exceeded. This means if you do run it at at high current then you should not allow a saturation voltage of something like 5v, but even that is probably too much, probably 2v max is a good rule of thumb unless of course it has to be operated in a warm environment and then you'll have to back off.
Of course this also varies with the package type and material (plastic or ceramic). The SOIC packages will be the worst.
 
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The 555's vary a bit, but the standard version can handle 200ma or more.

Who makes the "standard version?"

In discussing the Philips' (NXP) version, please show your circuit and data to support your assertion that the discharge pin can sink 200 mA.

John
 
I don't know why such 'tricky' means of increasing the load a 555 can driver are considered.. If you need more current use a totem pole power transistor addition to increase drive.

Given the number of variations of the 555 it's safer to stick with the stock listed capabilities (preferably de-rated a bit) and add additional circuitry as required, to stay well within the capabilities of any chip. It's sane engineering to properly over build a circuit to allow for the real world, and not to go for the bleeding edge of possibility.

It's much like modern CPU overclockers. Pushing the limits. You'll never see a commercial system that overclocks it's chips or allows you to that doesn't contain a full legal disclaimer that the instant you allow it to be overclocked you void the warranty.
 
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Who makes the "standard version?"

In discussing the Philips' (NXP) version, please show your circuit and data to support your assertion that the discharge pin can sink 200 mA.

John


Hi,

There are different versions, some are upgrades to the older standard style which would probably be the NE type.
You probably already know there is a CMOS version, but that's not the standard version really.
I'd have to find the old data sheet, but basically it gives 2.5v saturation voltage at 200ma, but the pin is not limited to 200ma which means it might sink more than that. The catch is that while it is sinking current, the package dissipation can not be exceeded. For example, lets say your application draws 200ma and the saturation voltage was measured to be 5 volts. This make the dissipation about 1 watt. The max temperature might be 150 deg C, and the thermal resistance might be 120 deg C per watt. With an ambient of 30 deg C, that would mean a case temperature of 150 deg C which would be too close for comfort. Something would have to be changed.
From that data sheet it sounds like the designers went through the trouble of making the pin 7 as indestructible as possible making this a primary design point. They want users to not worry about the discharge current as much as case heating, probably so that they dont have to worry about discharging higher capacitance capacitors.

The LM555 data sheet says, "The output pin can source or sink 200ma".
That data sheet also shows the discharge pin going as high at 100ma with around 1v sat voltage.

BTW the package dissipation would include both the discharge pin dissipation and the output pin dissipation.
 
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I've studied the datasheet but can't find any mention of the maximum current the 555's Discharge transistor can handle. Presumably it's "enough", but it would be nice to have a numeric value, or at least a guide as to the maximum capacitor value it can safely discharge. Anyone know?
Here is a data-sheet with typical values. It would appear to be beta limited (higher current at higher Vcc) so you might expect a large variation.

https://www.electro-tech-online.com/custompdfs/2011/11/LM555.pdf
 
Hi again,

Also consider the monostable connection. The discharge pin connects directly to the top of the capacitor. Thus, the discharge pin will sometimes handle large peak currents with caps with low enough ESR.

Interestingly, i did encounter one 555 where i had to connect a 220 ohm resistor in series with the discharge pin to keep the chip from latching up. I never went on to determine if it was just a fluke chip or this was something that had to be done with larger caps like 50uf or something like that.
 
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