MOS gate retention characteristics question

[jv1597]

I have a question on how a MOSFET reacts to multiple subsequent input at the gate. I'm working on a simple supply circuit consisting of two MOSFETs, a first MOSFET for current-limiting supply to a second MOSFET but I'm without equipment to try it out on-hand at this time. I would like to know if a subsequent input value of .5v at the gate on a MOSFET would be cumulatively retained after a prior input of .5v, summing both input values to 1v altogether; and if so, I would also like to know how accurately a value is retained and for how long. Thanks.

 

[Papabravo]

A MOSFET gate looks like a capacitor that must be charged and discharged. The memory, if you can call it that, disappears quite rapidly in relative terms. It is similar to a series RC circuit where the voltage rises and falls exponentially with a time constant τ. As a rule of thumb, it takes about 5 time constants to reach 99% of the final value. I would not expect any "summing" action on MOSFET gates.

That said, a schematic diagram of what you have in mind is worth more than several paragraphs of verbiage and maybe I don't understand what you are describing.

 

[jv1597]

Here is a depiction that might help...

 

[Papabravo]

It conveys no meaningful information that I can fathom.

 

[Nigel Goodwin]

It conveys no meaningful information that I can fathom.

Nope, totally meaningless - i imagine he doesn't have any idea how FET's work?, and he's wanting to do something that makes no sense.