Hello,
this is my first post in this forum, I just stumbled about the LTSpice model for the 74HC4046 made by alec_t in this thread:
https://www.electro-tech-online.com/threads/new-spice-model-for-cd4046b-phase-locked-loop-ic.149093/
First of all I want to say thank you for sharing the work.
Anyway, I could not get it running.
I tried the type CD74HC4046Ag from alec_t, as well as the version of Konstantin Paksutov, which can be also found in the thread.
Ich checked my values with the calculator, that can be found here:
https://www.changpuak.ch/electronics/4046_VCO_Calculator.php
As well as I did the calculations. I had this circuit also running on a breadboard before. This I need to check again.
Sadly. the circuit is not locking at all. It should lock between 1.76 MHz and 1.93 MHz.
I'm a bit stuck and I hope somebody sees the mistake I probably made or can provide me a working example, so I could follow that.
I attached the files from alec_t and Konstantin, as well as my circuit. I edited the symbol order, to fit it better into my circuit.
Thank you a lot, it would help me for my masters thesis.
Steffen
EDIT: Maybe shortly explained, what I want to do: I want to use the voltage at VCO_IN to detect the frequency of the input signal. I'm expecting ca, 1.1V at 1.84 MHz and 3.9 V ant 2 MHz. But it doesn't matter what, it is 2,5 V.
this is my first post in this forum, I just stumbled about the LTSpice model for the 74HC4046 made by alec_t in this thread:
https://www.electro-tech-online.com/threads/new-spice-model-for-cd4046b-phase-locked-loop-ic.149093/
First of all I want to say thank you for sharing the work.
Anyway, I could not get it running.
I tried the type CD74HC4046Ag from alec_t, as well as the version of Konstantin Paksutov, which can be also found in the thread.
Ich checked my values with the calculator, that can be found here:
https://www.changpuak.ch/electronics/4046_VCO_Calculator.php
As well as I did the calculations. I had this circuit also running on a breadboard before. This I need to check again.
Sadly. the circuit is not locking at all. It should lock between 1.76 MHz and 1.93 MHz.
I'm a bit stuck and I hope somebody sees the mistake I probably made or can provide me a working example, so I could follow that.
I attached the files from alec_t and Konstantin, as well as my circuit. I edited the symbol order, to fit it better into my circuit.
Thank you a lot, it would help me for my masters thesis.
Steffen
EDIT: Maybe shortly explained, what I want to do: I want to use the voltage at VCO_IN to detect the frequency of the input signal. I'm expecting ca, 1.1V at 1.84 MHz and 3.9 V ant 2 MHz. But it doesn't matter what, it is 2,5 V.
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