LTC3774 uses two error amplifiers to regulate one output voltage….why?

[Flyback]

Hello,
The attached pdf and LTspice simulation shows two SMPS’s in parallel. They both feed into a single output load at 25V. This is the best way to do it so that both SMPS’s deliver equal current into the load.

Why does the LTC3774 not do it this way?..

The LTC3774 (diagram on first page of datasheet) shows that the two feedback inputs are connected, and so both error amplifiers are both potentially fighting each other to regulate the single load. Why does LTC3774 not have a facility to have just one feedback signal, going into just one of the error amplifiers, which feeds both of the internal PWM comparators directly?

LTC3774 datasheet
http://cds.linear.com/docs/en/datasheet/3774fb.pdf

 

[alec_t]

From a quick read of the datasheet I understand one error amp senses forward current in the load whereas the other senses reversal of the inductor current.

 

[Flyback]

thanks, but in fact, that facility is not relevant to this question.
Can understand how you saw that though as its a detailed datasheet (though very well written as with all linear.com datasheets) The block diagram shows that each of the two error amplifiers outputs do not go directly into the pwm comparators, which is not that great when you want to parallel stages into the same output...because after all, the cctry between the error amp output and the pwm comparator may well have different tolerance between the different stages....not good for paralleling and wanting equal sharing of current

 

[simonbramble]

Firstly, the LTC3774 is designed as a dual output device that you can configure as a single output, dual phase converter. This is why it has 2 FB pins and 2 error amplifier outputs.

Here is how a current mode controller works (and the LTC3774 is no exception):

A current mode buck converter can be modelled as a voltage controlled current source. The 'voltage' is the voltage out of the error amplifier. The current is the current flowing through the current sense resistor. As the output voltage goes up, the FB pin is pulled up. The FB pin feeds into the inverting pin of the error amplifier, so as the FB pin goes up, the output of the error amplifier goes down.

The output of the error amplifier (the ITH pin) controls the peak current in the current sense resistor, so by pulling the ITH pin up and down, you can control the peak current in the inductor. This is the fundamental crux of current mode control - being able to control that peak inductor current.

If the maximum current sense trip threshold is 100mV, as the FB pin rises, the ITH voltage drops and this 100mV threshold decreases. This throttles back the peak current in the inductor. Therefore the error amplifier voltage is effectively controlling the peak inductor current - ie you have a voltage controlled current source.

If you join the 2 FB pins together, both converters are aiming for the same output voltage. However, by joining the ITH pins together (the outputs of the error amplifiers) you are forcing the same current through both sides of the converter. If both converters have the same transfer function of 'Error amplifier output to sense trip threshold' then they will share current equally. From batch to batch, this spec varies by about 5% so you can be assured that all converters in a parallel stack will share current to within 5%.

This is one of the beauties of current mode control. You can stack many smaller current mode buck converters in parallel and as long as you join the ITH pins together they will share current very well.

The LTC3774 has got a few bells and whistles in it, but it is still essentially working as described above. I think the reverse current comparator is to ensure you can detect when the inductor current is flowing negative, so you can decide then if to put the part in burst mode or forced continuous current. It has nothing to do with the basic control algorithm.

Have a look at the block dig of the LTC3854. This is a simpler version of the LTC3774, but the 2 chips are essentially both doing the same thing.

 

[Flyback]

Thanks Simon. I concur what you say, though i am surprised that the datasheet does not state your 5% figure for sharing equality. As you can see in my sharing LTspice sim of the top post, the single error amplifier signal goes into each pwm comparator "directly", and thus there is no worry about 'adjustment' to the error signal as it goes to the pwm comparator(s) as it goes straight there...in the LTC3774, the voltage at the joined ITH pins does not go straight into the PWM comparators, as there are some blocks in between, -but if you are saying that the effect is that sharing is always within 5%, then thats fine. I am just wondering why none of the datashests actually quote this figure.

 

[Flyback]

If you join the 2 FB pins together, both converters are aiming for the same output voltage.

As you know, there is a part-to-part analog tolerance on the reference voltage that is connected to each error amplifier. This means that suppose one of the error amplifiers has regulated such that its non-inverting and inverting inputs are the same, ….then another error amplifier in the same group of paralleled converters will not be in this position, due to the tolerance described. (their reference voltages are not exactly the same due to tolerance).
So for paralleled converters, we would prefer to have just one error amplifier driving a single error amplifier output, which would end up going into all the separate PWM comparators, and get sharing like that. (ie, like in the LTspice simulation in the top post)

 

[Flyback]

Thanks for info on LTC3854...may i ask is there a similar one with 30mV current sense reference? Also, which Linear.com sync buck converters are actually recomended for paralleled operation into a single output? (output voltage regulated as opposed to output current regulated)

 

[bountyhunter]

Hello,
The attached pdf and LTspice simulation shows two SMPS’s in parallel. They both feed into a single output load at 25V. This is the best way to do it so that both SMPS’s deliver equal current into the load.

Why does the LTC3774 not do it this way?..

The LTC3774 (diagram on first page of datasheet) shows that the two feedback inputs are connected, and so both error amplifiers are both potentially fighting each other to regulate the single load. Why does LTC3774 not have a facility to have just one feedback signal, going into just one of the error amplifiers, which feeds both of the internal PWM comparators directly?

LTC3774 datasheet
http://cds.linear.com/docs/en/datasheet/3774fb.pdf

You did not get that these are CURRENT MODE controllers. Current mode theory too complicated to cover in one post, but you can strap them in parallel without having them fight each other. CM topology shares inherently, that is it's main advantage.

 

[bountyhunter]

Firstly, the LTC3774 is designed as a dual output device that you can configure as a single output, dual phase converter. This is why it has 2 FB pins and 2 error amplifier outputs.

Here is how a current mode controller works (and the LTC3774 is no exception):

A current mode buck converter can be modelled as a voltage controlled current source. The 'voltage' is the voltage out of the error amplifier. The current is the current flowing through the current sense resistor.

As homage to reality, this simple statement is the single biggest problem with CM controllers in the real world. The sense resistor is external (dissipates way too much power to be on the chip) and it has to be placed in a high current path usually the inductor current. Those sense lines coming back to the chip pick up EMI like crazy and the internal circuitry has to be VERY wideband so it can trigger quickly when the current signal reaches the cutoff threshold. The bottom line is that noise pickup on the sense lines cause a lot of problems (like pulse jitter) and the layouts have to be very tight to avoid it.

 

[Flyback]

CM topology shares inherently, that is it's main advantage.

"Current output regulated converters" can be paralleled and share current as per there regulation...but "current mode" converters ( which are setup to regulate an output voltage) do not inherently share current with each other when paralleled.......they can be influenced to do so as in the explanations by Simon above, ...as in Simon's tying together of the ITH pins........but current mode converters, per se, (which regulate an output voltage) do not "inherently" share output current if put in parallel.

 

[bountyhunter]

If the maximum current sense trip threshold is 100mV, as the FB pin rises, the ITH voltage drops and this 100mV threshold decreases. This throttles back the peak current in the inductor. Therefore the error amplifier voltage is effectively controlling the peak inductor current - ie you have a voltage controlled current source.

As I recall, in our large CM control designs, it was like an "OR" connect in the control loop. There was a path sensing output voltage which could limit the pulse width and there was a path sensing inductor current and whichever one got to the threshold first cut off the pulse. Bottom line, current "limiting" was inherent and also current sharing when we strapped converters in parallel.

 

[bountyhunter]

"Current output regulated converters" can be paralleled and share current as per there regulation...but "current mode" converters do not inheretly share current with each other when paralleled.......they can be influenced to do so as in the explanations by Simon above, ..but current mode converters do not "inherently" share output current if shoved in parallel.

We shipped a bunch of them. In the big ones we had eight separate converter boards all strapped together in sync and they shared load current perfectly. The main converter was the "master" and all the rest were voltage controlled current sources that got their control signal from it. Point is that since a CM controller limits PW when it see's the current get to a set threshold level (the control signal), every converter was putting out the same current.

 

[bountyhunter]

"Current output regulated converters" can be paralleled and share current as per there regulation...but "current mode" converters ( which are setup to regulate an output voltage) do not inherently share current with each other when paralleled.......

Maybe I should have said they share current inherently if they are using the same control level and are tied together in the same loop. I didn't mean you can pick two random power supplies and strap the outputs together.

 

[Flyback]

Firstly, the LTC3774 is designed as a dual output device that you can configure as a single output, dual phase converter. This is why it has 2 FB pins and 2 error amplifier outputs.

Thanks, I appreciate why LTC3774 has two error amplifiers, but what I don’t see is, why, when it is only regulating one output voltage, does it not disable one of the error amplifiers? After all, if you want to regulate one output, then you only need one error amplifier. The LTspice simulation called “Paralleled SMPS’s_1” in the first post of this thread shows this.

Also, the LTC3774 claims to be able to control up to 12 sync bucks all feeding into one output load. What is it about the LTC3774 that makes it so suitable for this multi buck paralleling when other similar linear.com chips are not having such a glorious feature boast? For example, why is the LTC3834 not stated as being suitable for paralleling into a single output load..?
LTC3834 datasheet:
http://cds.linear.com/docs/en/datasheet/3834fc.pdf

Also, surely it just makes sense that if you are having eight sync bucks feeding into one output as in the simulation presented in this post, then surely you only need one error amplifier to feed all the pwm comparators of each sync buck…Different LTC3774 chips will have differently toleranced reference voltages into their error amplifiers…..so they will all be trying to regulate to slightly different output voltage levels. That is surely not a wanted situation..not when compared to having just one error amplifier feeding all the respective pwm comparator inputs. In worst case reference voltage tolerance differences, you can end up with each of the different error amplifiers clashing with each other, and resulting in “ticking” and unstable type operation. So why does the LTC3774 not have the ability to disable all but one error amplifier when say eight LTC3774 based sync bucks are feeding into the same single output load?
I am not criticising the linear.com range as I know they are the finest in the world.

LTC3774 datasheet
http://cds.linear.com/docs/en/datasheet/3774fb.pdf

Maybe I should have said they share current inherently if they are using the same control level and are tied together in the same loop.

OK thanks, the LTspice simulation in the top post of this thread, is called "paralleled SMPS's_1". -It shows the simplest and most effective way to parallel current mode SMPS's and ensure sharing of current between the SMPS's........the question here is, why does the LTC3774 not do it like this?

 

[bountyhunter]

Thanks, I appreciate why LTC3774 has two error amplifiers, but what I don’t see is, why, when it is only regulating one output voltage, does it not disable one of the error amplifiers?

The basic current mode design REQUIRES two error amplifiers because they are measuring two different things. One is output voltage and the other is inductor current. The output of these error amps feeds into a summing node and whichever error amp gets to it's threshold first cuts off the pulse which is to say turns off the FET switch. This is the main difference between basic current mode control and voltage mode. The latter does not measure inductor current or care what it is, it's control loop simply looks at the output voltage and adjusts the pulse widths to hold it at the target value.

Also, surely it just makes sense that if you are having eight sync bucks feeding into one output as in the simulation presented in this post, then surely you only need one error amplifier to feed all the pwm comparators of each sync buck

No, you would need one "master" controller measuring the output voltage and sending a control voltage level to all the subordinate converters. But each of them would be operating as a current source and would need "local" control from an error amp that measures the inductor current and compares it to the control level from the master controller. In that way all converters would put out the same current.

Different LTC3774 chips will have differently toleranced reference voltages into their error amplifiers…..so they will all be trying to regulate to slightly different output voltage levels. That is surely not a wanted situation

The subordinate controllers are NOT regulating based on output voltage, they are simply regulating until the current sense signal (derived from inductor current) rises to the trip off threshold at which point they cut off the pulse.

 

[Flyback]

The basic current mode design REQUIRES two error amplifiers because they are measuring two different things. One is output voltage and the other is inductor current. The output of these error amps feeds into a summing node and whichever error amp gets to it's threshold first cuts off the pulse which is to say turns off the FET switch. This is the main difference between basic current mode control and voltage mode. The latter does not measure inductor current or care what it is, it's control loop simply looks at the output voltage and adjusts the pulse widths to hold it at the target value.

Thanks for trying but this isnt relevant to the question being asked here. I am speaking about the use of multiple error amplifiers in the multiple LTC3774s which are all feeding into the same single output load. (and this load is voltage regulated to 1.5V in the simulation in post #14)

{The basic difference between current mode control and voltage mode control is that in CMC the ramp is derived from the inductor current , whereas in voltage mode control, the ramp is made synthetically inside the controller. (but his is not relevant to the discussion of this thread) }

 

[ChrisP58]

The part description on the first page of the datasheet says:
"Dual, Multiphase Current Mode Synchronous Controller for Sub-Milliohm DCR Sensing"

My interpretation of that, is that there are two controllers in one package, like a dual opamp is two opamps in a single package. Although, in this case, they are not entirely independent, as the two halves share a common oscillator.

Two controllers, capable of regulating two different output voltages, will need two independent PWM engines with two independent error amplifiers.

See page 33 of the datasheet for an application circuit showing the LTC3774 regulating two different output voltages.

Yes, the two halves can be combined to feed a single output as shown in the typical application on page one. But that choice is up to the end user.

 

[Flyback]

Two controllers, capable of regulating two different output voltages, will need two independent PWM engines with two independent error amplifiers.

Thats agreed , but is not the question here...the question is why one (or more) error amp(s) cannot be disabled when operating two or more ltc3774 based sync bucks in parallel, feeding into the same load, which is voltage regulated. Only one error amp is needed to regulate one output....no matter how many sync bucks are feeding into that one output....having more than one error amp, (with slightly different reference voltages to each other due to tolerances), all trying to regulate to what they each "think" is vout, is counter productive, and in the worst case, can cause instability.
The ltspice simulation in the top post shows how simple and effective it is to do it with just one error amplifier, controlling more than one smps, into the same output...this could have been arranged with the ltc3774...why is it not possible to do it like this with the ltc3774?

Also, why is it that the LTC3774 is stated as being suitable for paralleling up to 12 sync bucks into the same single output, but there is no such boast made in other similar linear.com parts datasheets, such as the LTC3834? (datasheets linked in post #14)

 

[Flyback]

The attached from linear.com shows a very differently organised way of paralleling SMPS's into the same single output, using LTC3791...why does the LTC3774 get away with simply tying the ITH pins together and tying the feeddback pins together?
The attached LTC3791 method involves "master-slaving" and sensing Iout in each converter, and then processing all that and making them share current....very different to any explanation given in any of the LTC3774 datasheet or app notes.

LTC3791 Presentation removed due to request to remove it.

 

[ChrisP58]

If it's made to be able to run as two independent regulators, then it need two error amps. When combining the two halves together for a single output, the choice is to leave everything on the chip alone and make the user connect up the inputs of the two EAs in parallel, or, integrate some form of switching that can change the configuration between single and dual output mode. Is there an unused pin that can be used as a mode switch?

But really. Is there some functional flaw in using the two EAs as is? Or is it just that it doesn't match your sense of 'done the right way'?