LTC3774 uses two error amplifiers to regulate one output voltage….why?

[alec_t]

The attached from linear.com shows a very differently organised way of paralleling SMPS's into the same single output, using LTC3791...why does the LTC3774 get away with simply tying the ITH pins together and tying the feeddback pins together?

If the 3791 is a later chip than the 3774 then perhaps your 'issues' were taken into account in the design of the 3791? Why not ask Linear?

 

[Flyback]

But really. Is there some functional flaw in using the two EAs as is? Or is it just that it doesn't match your sense of 'done the right way'?

The LTC3774 method of paralleling output voltage regulated SMPS's by simply tying together their ITH pins, (and FB pins) , doesn't match linear.com's own flashy way of doing it as presented in post #19.
Presumably the method of post#19 is the more accurate way to do it.
Presumably the paralleled LT3791 based SMPS’s of post #19 could instead be paralleled by just simply tying together their VC pins, and tying together their FB pins. That’s quite a bit simpler so it makes you wonder why they don’t do it, or offer it as an alternative.

Interestingly, the LTC3774 method of paralleling SMPS’s (when more then two are paralleled) is not demonstrated in any diagram anywhere on the linear.com website…and this makes you wonder if it’s a bit more dodgy. The LTC3774 says that up to 12 SMPS's can be paralleled by simply tying together ITH pins, but never shows it being done in a diagram, whereas in post#19, linear.com presents a lot of diagrams for the “flashy” way of paralleling SMPS’s via the "master slave" method.

For very low voltage outputs, the method of post#19 is not too suitable due to the drop across the output current sense resistor, so presumably thats why its not recomended for low voltage sync bucks. The LTC3774 method suffers some inaccuracy when inductors are differently valued due to tolerance, but thats not usually a big problem.

 

[simonbramble]

Guys - I need to clear some things up. Here goes. Get a coffee and sit down..

Firstly a current mode controller regulates output CURRENT, not voltage (ironically). Its control algorithm is designed to regulate output CURRENT, that is turned into a voltage by the load (say, a resistor). It measures this output voltage and creates an error signal (using the error amplifier) and the output of this error amplifier modulates the CURRENT (not output voltage). Think of the output voltage as being a mere consequence of the control mechanism. The chip is changing its output current, not output voltage. Yes it is measuring the output voltage, but it is changing the output current (to change the output voltage), not the output voltage itself. The output voltage is just a byproduct.

There will be a difference in error amplifier characteristics due to offset voltages and reference tolerances. This is what accounts for the non perfect sharing of current. Because the current mode controller outputs CURRENT (I think I mentioned that before), if one phase has a lower reference than the other phase, it will provide more current than the other phase, but it wont provide all the current (while the other phase provides none). If the reference voltage of one phase is 2% low, this phase will produce, roughly, 2% more current.

So with this in mind:

"Current output regulated converters" can be paralleled and share current as per there regulation...but "current mode" converters ( which are setup to regulate an output voltage) do not inherently share current with each other when paralleled.......they can be influenced to do so as in the explanations by Simon above, ...as in Simon's tying together of the ITH pins........but current mode converters, per se, (which regulate an output voltage) do not "inherently" share output current if put in parallel.

Current mode converters DO share current, since they are outputting a current, not a voltage, as explained above. The tying together of the ITH pins ensures the controllers have the same error voltage, so hence output the same current.

Point is that since a CM controller limits PW when it see's the current get to a set threshold level (the control signal), every converter was putting out the same current.

Yes - kind of... the high side FET drive terminates when the current limit is reached. If you go through the maths, the duty cycle of the PWM is determined by the inpututput voltage ratio and not the controller. The controller settles down to this duty cycle because of the currents in the external inductor, not because it explicitely wants to.

Maybe I should have said they share current inherently if they are using the same control level and are tied together in the same loop. I didn't mean you can pick two random power supplies and strap the outputs together.

This is correct. You need 2 controllers that have the same transfer function from the FB pin to the current sense trip threshold. If you use 2 different controllers, you can adjust the current sense resistor to ensure they both have the same transfer function, but obviously it is easier if you use 2 controller and design both controllers with the same external components.

Thanks, I appreciate why LTC3774 has two error amplifiers, but what I don’t see is, why, when it is only regulating one output voltage, does it not disable one of the error amplifiers? After all, if you want to regulate one output, then you only need one error amplifier. The LTspice simulation called “Paralleled SMPS’s_1” in the first post of this thread shows this.

This is because each converter is controlling its output CURRENT, not voltage. An increased output voltage is just a byproduct of an increased output current. Thus they do share current very well.

Also, the LTC3774 claims to be able to control up to 12 sync bucks all feeding into one output load. What is it about the LTC3774 that makes it so suitable for this multi buck paralleling when other similar linear.com chips are not having such a glorious feature boast?

ANY current mode controller can be paralleled in as many phases as you want. They only difference with the LTC3774 is that you have a phase shifted output clock that means each controller turns on its high side FET at a different point in time so you don't end up with huge gulps of current on the input. With a 12 phase dc/dc converter, you can have 13 phases, it is just that phase 13 will be in phase with phase 1. You can design a 12 phase circuit using 6 dual phase controllers, but if you don't have the phase shifting feature of the LTC3774, the odd phases will be switching on together and so will the even phases. The LTC3774 shifts the drive to the high side FET.

The basic current mode design REQUIRES two error amplifiers because they are measuring two different things. One is output voltage and the other is inductor current. The output of these error amps feeds into a summing node and whichever error amp gets to it's threshold first cuts off the pulse which is to say turns off the FET switch

No - there is only one error amplifier and this controls the trip threshold of the current sense circuit to control the output current. Sometimes this is explained as having an outer feedback loop (to measure the output voltage) and an inner feedback loop (to measure the inductor current), but there is only one error amplifier. When the output voltage reaches regulation, the ITH pins drops, throttling back the inductor current (to zero), thus keeping the output voltage in regulation

No, you would need one "master" controller measuring the output voltage and sending a control voltage level to all the subordinate converters

No - in a true multiphase buck converter, they are all masters. The LT3791 circuit below is different because this is a buck boost controller. You need a master slave configuration to ensure current is shared when Vin = Vout

The attached from linear.com shows a very differently organised way of paralleling SMPS's into the same single output, using LTC3791...

Where did you get this from? I was in that presentation and this info is confidential (!)

I hope the above helps

Simon

 

[Flyback]

Simon, Thankyou for your comments.

Current mode converters DO share current, since they are outputting a current, not a voltage, as explained above. The tying together of the ITH pins ensures the controllers have the same error voltage, so hence output the same current.

As you know, Current mode converters (that regulate their output voltage) do NOT inherently share current when there outputs are paralleled……HOWEVER, they will relatively well share current as in the cases above (which you have detailed) when their error amplifier outputs are tied together. As you know, we can only tie error amplifier ouputs together when it’s a transconductance error amplifier, as in most of the linear.com controllers mentioned.
By the way, even if the error amp outputs are tied together, they will not perfectly equally share current if they have different value inductors by tolerance.

This is because each converter is controlling its output CURRENT, not voltage. An increased output voltage is just a byproduct of an increased output current. Thus they do share current very well.

They do indeed share very well when the transconductance error amp outputs are tied together as in the LTC3774 example, because transconductance error amp outputs can indeed be paralleled, which i believe you agree with this.
I am sure you would agree, that this thread has never been referring to converters that control their output current.
As you know, The whole subject of this thread is around the paralleling of converters that each were meant to regulate their output voltage…and ensuring that output current is shared equally (or nearly so) between them when their outputs are paralleled

No - there is only one error amplifier and this controls the trip threshold of the current sense circuit to control the output current. Sometimes this is explained as having an outer feedback loop (to measure the output voltage) and an inner feedback loop (to measure the inductor current), but there is only one error amplifier. When the output voltage reaches regulation, the ITH pins drops, throttling back the inductor current (to zero), thus keeping the output voltage in regulation

Thankyou this is absolutely correct, the bit I was missing earlier, was that transconductance error amplifiers (preferably in like-for-like current mode controllers) can "generally" be paralleled when you have a load of like-for-like SMPS’s and you want a greater overall output.

No - in a true multiphase buck converter, they are all masters. The LT3791 circuit below is different because this is a buck boost controller. You need a master slave configuration to ensure current is shared when Vin = Vout

Yes but im sure you are aware that the method in the LT3791 datasheet is the most accurate way to get sharing in any topology, because the method of just tying together ITH pins in bucks means that you get a slightly different current from each converter due to their tolerance on their inductor value.
-I know that you agree with this because you have already explained how the error amp output sets the peak current level.
I don’t know where I got the LT3791 thing from, but it’s a cracking good idea to get really good sharing.

So i beleive our joint conclusion is that the TRANSCONDUCTANCE error amp outputs can indeed be paralleled...and its not worth disabling all but one of them, because the eight TRANSCONDUCTANCE error amps in the above situations, do not fight with each other, and do not thence give instability. they work fine together, with just a bit of unequalness in the output current of the smps due to the slightly different tolerances on the various inductor values.

I think in the above, we have often thought one another were referring to the "output of the smps", when we were in fact referring to the "output of the transconductance error amplifiers".

 

[alec_t]

Where did you get this from? I was in that presentation and this info is confidential (!)

Well, it was until posted in this forum .

 

[simonbramble]

Flyback - please can you remove that presentation. Thanks. Simon

 

[simonbramble]

Hi Flyback. I think we are both agreeing with each other and maybe coming at the same problem from different angles. All of the above in your last post is correct. The inductors have to be the same value to enable good sharing. This brings me on to a 'fault' with current mode dc/dc converters. The load demands a current equal to the *average* inductor current, but the controller regulates the *peak* inductor current. With a different inductor value on each phase the peak current to average current ratio will be different, so yes they will not share current equally.

To force 2 dc/dc converters to share current, design 2 identical circuits to handle half the current each. Then join the ITH pins together (as you rightly say) to force them to share current and join the FB pins together (so each error amplifier has the same error signal). You also need to join the softstart, RUN and logic pins together, but this is aside from the main control loop.

I think I was misunderstanding your earlier posts. You cannot just connect the outputs together and expect them to share current. You are correct on this. In this case they definitely won't. You also need to connect the ITH pins together.

LTspice is your friend for seeing exactly what is going on..

(thanks for removing the presentation - I really appreciate it)

Simon

 

[Flyback]

Thanks Simon, a new question which i have "brewing" about the excellent linear.com range (please only answer if you have time) is "why is the error amp output is sometimes called the "ITH" pin, and sometimes , on other chips in the linear.com range it is called the "Vc" pin?

This property of transconductance error amplifiers is better than i thought.....in the case of say eight paralleled LTC3774 "like for like" converters paralleled.....with all the ITH pins and FB pins joined, and even with the slight tolerance difference on each ones reference voltage...the transconductance error amplifiers do not actually fight each other....there is no resultant instability. ( as long as each stage separately was stable in the first place).

 

[simonbramble]

Hi Flyback. Thanks for the compliment on the product range. The ITH pin stands for Current (I) Threshold (TH) and its voltage is proportional to the current trip threshold. Move the ITH pin up and down and the current trip threshold moves up and down. (I think we have already done that to death). It used to be called the VC pin (compensation voltage).. I believe (although this is only guesswork) that the voltage mode controllers have a VC pin while the current mode controllers have an ITH pin. I see the LTC3115 (voltage mode controller) has a VC pin. This makes sense as the ITH pin controls the peak current going through the inductor in a current mode controller - just in case we have not mentioned it already..

 

[simonbramble]

I have just given a presentation on this in the UK so it is all fresh in my mind.

Just for completion, the softstart pin overrides the reference voltage on startup, so the output regulates according to the softstart voltage and not the reference voltage. This continues until the softstart voltage equals the reference voltage, then the reference voltage takes over.

If you put a ramp voltage on the softstart pin (by charging the cap with a constant current), you can impose a linear ramp on the output voltage (since Vout is proportional to the 'reference' voltage)

But what a lot of people dont know is.... by overriding the reference voltage, you are forcing the output of the error amplifier low on startup (FB is low, SS is low therefore ITH pin is low), so the softstart voltage also softstarts the peak inductor current. If the ITH pin starts at 0V, the peak inductor current is at 0V. Ramping the SS voltage not only ramps the output voltage, but also the input current.

So the softstart voltage is interwoven with the ITH voltage, the FB voltage and the peak inductor current.

Useful interview question if you ever interview a power supply expert

 

[simonbramble]

I've written it up:
Current Mode dc/dc converter operation:
http://www.simonbramble.co.uk/dc_dc...ter/current_mode_dcdc_converter_operation.htm