LM317 Circuit Challenge

[MrAl]

Hi Merv,


<applause> @ Merv

Yes, very good Merv, that looks like a good solution, one which i think i can use.
A slight improvement is possibly to add a second transistor, NPN, base driven by the first one's collector, emitter to ground, collector to the output of the LM317. Not too much more complexity to pull the output to zero on a fault (or whatever the LM317 really defaults to with a near short on the output). The first transistor forces current through the second, the second shunts the output directly to ground. That should take care of the +2.1v problem (although that isnt really too bad either).
I havent tested this yet though If you already have a sim set up, perhaps you would care to try it.

The only problem left now (not truely a problem, just an inconvenience) is that this (and other) solution(s) require a 2k pot to get quite good adjustment ranging (actually very good, spread nice and evenly over the full voltage range) and although that isnt impossible, it would be nice to be able to use a 10k pot with this.
Not truely a necessity i guess though.

Thanks for the idea! I have a feeling that this idea increased your so called "reputation" he he.

BTW, some capacitance on the ADJ terminal to ground is usually a good idea anyway, as much as 10uf even, that helps reduce ripple. I would be using some capacitance on that terminal anyway because of that and to keep any static from the pot arm from bothering anything.

 

[Hero999]

Yes, it's a brilliant idea, I don't think I would've every thought of it!

 

[Roff]

Hi Merv,


<applause> @ Merv

Yes, very good Merv, that looks like a good solution, one which i think i can use.
A slight improvement is possibly to add a second transistor, NPN, base driven by the first one's collector, emitter to ground, collector to the output of the LM317. Not too much more complexity to pull the output to zero on a fault (or whatever the LM317 really defaults to with a near short on the output). The first transistor forces current through the second, the second shunts the output directly to ground. That should take care of the +2.1v problem (although that isnt really too bad either).
I havent tested this yet though If you already have a sim set up, perhaps you would care to try it.

The only problem left now (not truely a problem, just an inconvenience) is that this (and other) solution(s) require a 2k pot to get quite good adjustment ranging (actually very good, spread nice and evenly over the full voltage range) and although that isnt impossible, it would be nice to be able to use a 10k pot with this.
Not truely a necessity i guess though.

Thanks for the idea! I have a feeling that this idea increased your so called "reputation" he he.

BTW, some capacitance on the ADJ terminal to ground is usually a good idea anyway, as much as 10uf even, that helps reduce ripple. I would be using some capacitance on that terminal anyway because of that and to keep any static from the pot arm from bothering anything.

Do you really want to have a short circuit to GND across the output? Isn't that going to send the LM317 into thermal shutdown or current limiting? Maybe that's OK.

 

[MrAl]

Hi Ron,

Arent those LM317's able to take a short to ground that would put them into cutout mode? Current is going to be somewhere around 1.5 amps i think. I would be willing to size the NPN accordingly.
I also found that by using a third transistor (PNP) driven by the second transistor (NPN) the third one can pull the voltage down as low as 0.75v, which should be good enough for almost everything, while keeping power dissipation under 1.5 watts in the transistor. Also, this would be a fault condition which would be recognized pretty quickly so the power could be turned off almost right away.
I have all the parts in stock here to try this, except for the 2k pot. I mainly keep 10k pots around.

BTW, that LM317 spice model might be a little outdated... R26 should probably be around half of what it is shown there (0.05 instead of 0.1).

 

[Roff]

Hi Ron,

Arent those LM317's able to take a short to ground that would put them into cutout mode? Current is going to be somewhere around 1.5 amps i think. I would be willing to size the NPN accordingly.

BTW, that LM317 spice model might be a little outdated... R26 should probably be around half of what it is shown there (0.05 instead of 0.1).

Well, I don't know, but if the output goes to 0V, there will be no current in the PNP, so no current in the NPN...

 

[MrAl]

Hi again Ron,

Yes, although there is that small bias current, which may do it but im not sure yet.
If not that's ok i guess, because at that point it becomes a feedback system where if the output gets pulled down too low the drive gets decreased, so it reaches an equilibrium point there which i think is around 0.75 volts or something around there. If it tries to go higher, the drive increases and pulls it down, if it tries to go lower, the drive decreases and so it goes higher again, etc. I believe that 0.75v should be good enough for anything because after all if anyone was testing something that really requires 0.75v or less then they couldnt be using that power supply anyway because it only adjusts down to 1.2v or around there

I was a little worried about the +2.1v problem, but we have to keep in mind that many things we test will require a voltage much higher, like 3v or 5v or something like that, so for many many people the single transistor will probably be adequate right?
It just so happens that a couple weeks ago i was testing something that had to be adjusted down to 50 microvolts, so i guess we would have to come up with a solution for that too, maybe a small negative bias supply is the only way to go there. We'd get it all then

 

[Roff]

I think you would have to run hardware tests. The spice model seems to support current limiting that is a function of the voltage across the device (power dissipation limiting?), but I don't know if it is accurate for a sustained overcurrent condition. If hundreds of mA do continue to flow with the NPN "shorting" the output, the feedback loop that includes the two transistors forces a low limit on the output voltage of the Vce(sat) of the PNP plus the Vbe(sat) of the NPN. This probably can't go below about 1V, because of the finite beta of the NPN. I tried an FZT849 with a 100k resistor from base to GND, and the output limited at about 1.2V.

 

[MrAl]

Hi there Ron,


Yes, that's what i got too, but that was with only two transistors. The three transistor solution took it down to 0.75 volts roughly.
Also i agree that a Zetex transistor would probably be required to get to 1.2v with only two transistors.

 

[Roff]

Hi there Ron,


Yes, that's what i got too, but that was with only two transistors. The three transistor solution took it down to 0.75 volts roughly.
Also i agree that a Zetex transistor would probably be required to get to 1.2v with only two transistors.

I tried what I think you are referring to - the PNP sense transistor followed by a common emitter NPN, followed by a BF PNP emitter follower. The voltage did go down to 0.75V, but the current was 700mA. OK for the PNP, HOT for the LM317.

 

[MRCecil]

Roff & MrAl,

I've been gone all day spending my time at the VA facilities nearby, so I missed a bunch here. First, my thanks to all who noted my feeble input with such praise. I was overwhelmed!

To the discussion I have been following between you two, I see an ever expanding solution to get the output down from ~2.1V to 0V. My teacher, mentor and friend, may he RIP, drilled into me the concepts of KISS, CHEAP and SIMPLE. It keeps the complexity to a minimum, saves costs in parts and saves real estate on the PCB, reducing costs, and becomes better understood by ones peers.

Yes, the original challenge was to get the output down to zero volts, but also to maintain thermal stability. I cannot see, at this point, a reconciliation of those two objectives by pulling the output to 0V by any means, but I could be very wrong.

Would it not accomplish both parameters to cut the current at the INPUT to zero to accomplish both objectives? Perhaps using a TO-220 transistor, a MJ2955 or 2N3055, or a GTO thyristor, which could be turned on and off? The transistor would be in saturation so the power loss would be minimal and zero in cutoff not requiring a heat sink. The GTO would require a minimum as low as 800mv and gnd, at the gate, to change conduction state (not really well versed in these as I have not used any in my designs). One of these two options could be explored to create a two-stage shutdown and a single stage recovery, which should be slowed for obvious reasons.

Adding multiple components to accomplish the objective is fine, if the initial paradigm of thermal behavior is observed along the way. It seems obvious to me to look at the Iin rather than the Vout in this set of exchanges. The trick is sensing the closure of the wiper for the recovery. I'll look into that tomorrow to judge the efficacy of that approach. The aim is to save the load from damage, but what also must be considered is potential damage to the regulator from my POV. I may be full of it in this regard, but it may be possible.

Again, thanks to all for the kudos...I am humbled.

Merv

 

[Roff]

Merv, I thought about a latching current interrupt scheme, but concluded that it might be subject to nuisance trips and power-up issues. Also, the original statement included simplicity, and I thought it would require too many parts. If you can do it simply, without latching, and without oscillations (which would obviously not protect the load), then you'll get even more kudos.
I like the challenge, but I don't want this to be my life's work.

 

[jack0987]

I am just a beginner and have read this (not completely yet) with interest and should not be posting here due to my lack of knownledge.
What I might consider doing is having a seperate control circuit and compare the two outputs.
The chances of them both failing at the same time would be next to zero. best of luck.

 

[MRCecil]

Ron,

I came up with a rather inelegant solution today, which includes a NO MOM switch for reset, not unlike a current overload reset for a lab supply rather than an auto restart. I'll post the schematic and transient responses tomorrow AM after I clean everything up a bit.

Cheers,
Merv

 

[MrAl]

Hi again,

I think that between you (Merv) and Ron you did a great job of thinking this up and testing it out, and i think that it is the simplest solution, but yes
i am still considering other circuits as long as they are also simple like the first one with up to say three transistors.

I havent tested any of this for transient response yet but i would think that if the pot goes open the transistor will react so darn fast that it will
beat out the LM317 by a long shot, so that the output will die down quite fast with the single transistor solution and with the two or three transistor circuit the output should get pulled down faster than i can imagine, like less than 1us perhaps, but i guess it depends a lot on how fast the transistor used can switch 'on'. Of course testing (sim) would be in order, which i think i shall attempt next.

ADDED LATER:
Ok, the three transistor circuit does switch in less than 1us, even less than 500ns, which is good, but i dont think this is a necessity here.

Another improved circuit is as follows:
Starting with the single transistor solution, disconnect the 120 ohm resistor where it connects to the ADJ terminal only, keeping the emitter of the transistor connected to it, and connect a 60 ohm resistor from the junction of the 120 ohm resistor and the emitter and the other end of the resistor to the ADJ terminal. So far now the circuit is exactly the same as before except there is a 60 ohm resistor in series with the ADJ terminal, so only the 60 ohm resistor connects directly to the ADJ terminal. Now break the collector ground terminal of the transistor and connect it to the base of a small NPN transistor, and connect the NPN emitter to ground, and NPN collector directly to the ADJ terminal.
Now when the PNP turns on it turns the NPN on (as before with the two transistor solution) but now the NPN pulls
down the ADJ terminal rather than the PNP. The difference is that with a Zetex low sat NPN transistor the output pulls down to 1.5v, which is really good enough for now i think. There is a tiny loss of temperature stability due to the delta of the bias current with temperature through the 60 ohm resistor, but it's so small of a difference it wont bother anything (that's one of the reasons i kept it small though).

Still open to other ideas though...

 

[MRCecil]

MrAl & Ron

Well, between the honey-do projects and prepping for our Tues. departure for our summer on the Western Slope in Montana, I have come up with something that is close to the outlined parameters, but not at all the best solution, even given it is my forth iteration. I worked the problem from the supply side to reduce any thermal stress on the regulator, vice your works' on the other side.

First note that the 2N3055 (Q3) is not what should be used, but it was in the library, and I didn't take time to cross check the few NPN's there with a more suitable substitute that would handle the full output load. The value of C3 is critical to reduce any chance of oscillations during fault condition. R2North & R2South represent the potentiometer, and R2 is the "lift" resistor to take the minimum output to 2.4V. Without R2, there is an overshoot from 1.3V to ~2.4V because of the propagation time to shutdown Q2, the pass Xistor. The overshoot varies with the load from ~6.5us to 40us, full load to no load respectively.

I've included a series of sim screenshots depicting the behavior. Above 2.4V, it appears to act properly to full voltage with varying loads, shutting down the supply voltage to the regulator to ~2.5V with ~0.65V out of the regulator.

The one inconsistency noted was that the model of the LM317 seems to "fold" in current overload at approximately 50% of that in the data sheet regardless of overhead and output voltage. I tried the LT1086, a relatively close match to the LM317, and it was even worse. Neither matches the datasheet curves or derating data as far as I have found. I could be wrong here, but...

Cheers,
Merv

 

[MrAl]

Hi Merv,


Yes as i was saying previously in this thread, the model for the LM317 is probably outdated and R26 should be about 0.05 rather than 0.1 or something like that. Try that for some better results.

I think i like this new solution too. One little thing though is it looks like after a certain time the output gets enabled again (after the 10uf cap charges up again) because the drive for keeping it low disappears once the power gets cut. If the oscillation period is long enough though it might not matter i guess.
Just something to think about.

 

[MRCecil]

Hello MrAl,

I guess I should update the .sub file then for the LM317...thanks!

Regarding your second paragraph, I ran that test and knowing that the input voltage to the regulator isn't clamped to zero...that would cause severe oscillations and make the scheme unworkable owing to regeneration once the near-ground potential was removed from the base of Q4. The frequency of oscillations would be in the range of several hundred Hz up to ~71KHz based on loading and level of Vout at time of the fault.

I ran the sim out to 100 minutes with only two pulses representing a fault condition(please see the pulse setup in the attachments). There was no regeneration of the output after the second and final fault. Note that the input voltage to the regulator is not clamped to zero but to ~2.5V allowing the Q1 to continue in conduction to supply the bias voltage to Q4 just enough to supply base current to Q2, via Q3, to set that condition of the ~2.5V into the regulator; the 10uf cap serves only to dampen the possibility of oscillations at the initiation point of the fault sequence.

Now if it will work in the real world is another question, owing to the Spice modeling of the transistors employed. That's where real-world prototyping, on a real board, comes into the realm of gathering emperical data.

Cheers,
Merv

 

[MrAl]

Hi again Merv,


Ok sounds good then...this is something i will have to try on a breadboard. Would be nice to see working in the real world next.

 

[Roff]

Merv, could you post your .ASC file, so I don't have to recreate your schematic?

 

[MRCecil]

Sure! It should be attached, Ron.