Is there a good Via size?

[Pommie]

I'm currently routing a board where the standard track width is 0.4mm and via size 0.65mm with a 0.35mm hole.
For power rails, I prefer something a little heavier.
I assume that all holes are plated to a specific thickness. Anyone know what this is?
I, therefore, also assume that a plated 0.5mm hole will contain more copper than a 0.35mm hole.

Is there a way to work out the ideal via size for a given track width? I.E. for a 0.7mm track what should the via size and hole size be?

Thanks,

Mike.
Edit, this is for electrical transfer not heat.

 

[augustinetez]

If you are getting the pcb's made via one of the cheap fabs in China, ask them, they usually have the data on their site re VIA's.

From memory, PCBway mentions the thickness of the plating in a through hole/VIA as being 0.1mm.

I use 0.8mm pad with 0.4mm hole for signal track via's normally.

For power tracks, I normally arrange any layer changes to occur at the legs of through hole components if possible.

A bigger hole with plating won't necessarily give a large increase in current handling capacity because of the thin wall plating of modern pcb's.

 

[Pommie]

A bigger hole with plating won't necessarily give a large increase in current handling capacity because of the thin wall plating of modern pcb's.

Assuming a 0.1mm plating thickness then the CSA is proportional to the circumference of the hole (length of copper plating) So a 0.5mm hole will have twice the copper of a 0.25mm hole. Or did I miss something?

However, knowing 0.1mm thick helps a lot. The CSA of a 1mm track (1oz copper) is 0.035mm². That means that a 1mm trace has less CSA than a 0.25mm plated hole - CSA 0.047mm². I think the 0.1mm must be too general and will look more.

Thanks,

Mike.

 

[Pommie]

Just found a site that states they start with ½oz copper and then plate ~20 to 25µm onto it to get ~1oz copper. This would mean that the plating is ~0.020 to 0.025µm in the holes. This means to match the CSA of a 1mm track you would need a 0.9mm hole. That's a big hole which suggests I did something wrong.

Sorry to all the USA members, I only do metric.

Mike.

 

[augustinetez]

Or did I miss something?

No, the amount of extra copper in a bigger VIA does of course give higher current capability, but, because the plating is so thin, the extra increase is not that large in terms of power rail current handling capacity, that's why you will often see multiple VIA's at the point where a power rail changes layers.

I was taught (admittedly a long time ago now) not to make layer changes with power rails using VIA's because of:
a: limited power handling capability
b: problems of VIA fracture caused by flexing, either mechanical, physical or temperature induced expansion/contraction.

PCBway spec hole plating as 18-25 µm, see item 21 https://www.pcbway.com/capabilities.html

In one of their FAQ's - Regardless of the thicknesses of finished out layer copper, the thickness of the through-hole copper IPC Level 2 standard is 20UM and 25UM for IPC Level 3 standard.

 

[rjenkinsgb]

I always use multiple VIAs in power-carrying traces if I have to change sides other than at a component lead.

And often make them larger, anything up to 1mm hole. There is no good reason for narrow power tracks if there is spare space on the board.

I never use less that 0.6mm VIAs anywhere unless track density forces it.

 

[Pommie]

I wonder if I'm overthinking this. Most tracks on the board will carry 6mA, some 24mA and the main power rails <200mA. My power rails are currently 0.7mm and all others 0.5. Vias are all 0.7 with a 0.4mm hole. I've got a ground plane bottom side and positive plane top side. The board is 136mm x 160mm so many long tracks.

Any thought?

Mike.

 

[Ian Rogers]

A common fix is to "stitch" the top and bottom with many small via's... I did a motor driver and used a Pololu driver board

Look at the output Lots of tiny via's.. This makes the through boad pretty solid..