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inverter output transformer saturation

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franticET

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Hi,
i'm testing an inverter with these features:
Fswitching=220KHz
Fout=3KHz-10Khz
Vout=150Vac
Pout=150W
Current feedback.
Sinusoidal output is obtained with transformer leakage inductor+output capacitor.
In the figure below there is the schematic.

cfcd.png


The problem is that a little DC component (about 100mA) put transformer into saturation and the output waveform has a distorsion as in figure

cfcdfo.png



I don't understand from where it can come this DC component. Could you help me?

A capacitor could solve my problem? what features should have this capacitor? Ceramic or film cap? I had thought of 47uF@25volt as the voltage across it should never be too high.

Let me know.
 
Your circuit has nothing to properly turn on the upper Mosfets with a gate voltage that is 10V higher than the 70V supply voltage. A Mosfet driver IC normally does it.
 
The problem is that a little DC component (about 100mA) put transformer into saturation and the output waveform has a distorsion as in figure
If you drive the MOSFETS at 50.5%/49.5% (not symmetrical) there will be DC current. You could look for this DC current and adjust the drive. Or you can add a capacitor.

If things go wrong you could get 70V across the cap. Look for a high current cap. Most caps will burn up at high current.
 
If you drive the MOSFETS at 50.5%/49.5% (not symmetrical) there will be DC current. You could look for this DC current and adjust the drive. Or you can add a capacitor.

If things go wrong you could get 70V across the cap. Look for a high current cap. Most caps will burn up at high current.
I'm thinking of a transzorb protection across the capacitor. Is it a good idea?

Another question: what capacitor technology is most suitable for this application, ceramic, film or other?
Let me know.
 
Don't you see that the lower Mosfets have a good gate voltage much higher than the grounded source pin but the upper Mosfets are source-followers and need a gate voltage 10V higher than the supply voltage for them to properly turn on??
 
I've seen that waveform many times before on simple homemade power inverters based on low frequency iron core transformers that use a simple LC tank circuit effect on their secondary windings to reshape a square wave input into a more fitting sine wave shape output.

Most often it comes from there being too much capacitance on the transformer's secondary winding set causing a basic LC tank resonance that's large enough and just out of synchronization far enough with the system frequency being dictated by the driver circuits to create a offset beat effect.

Best guess is that the 20 uF - ? capacitor on the secondary, is trying to setup a LC tank resonance that's about 10 - 20 percent lower than the driver circuits frequency.

I would be tempted to try changing it to a ~15 uF ? value and see where the waveform notch drops in at or if it disappears all together.
 
Don't you see that the lower Mosfets have a good gate voltage much higher than the grounded source pin but the upper Mosfets are source-followers and need a gate voltage 10V higher than the supply voltage for them to properly turn on??
AG - regarding the above, I think that the diagram is intended to be conceptual rather than a complete schematic. You're right, of course, but I suspect that the OP knows how to drive FETs.

Ron is correct; you can servo the DC component to 0 (how effective this is will depend upon how accurate your servo is) or you can simply AC couple the transformer using a capacitor.
Personally I'd prefer to fit a capacator, as this guarantees zero DC. You could then use a servo as well to adjust for zero DC across the capacitor and therefore exactly 50% duty cule on the bridge. About the only reason I can think of not to fit a capacitor would be if your design was of such high power that the capacitor would be prohibitavely large or lossy.
Capacitive coupling also helps protect the bridge and transformer against some modes of failure.

Film capacitors are generally used in these applications (Polypropylene usually I think - but I'd need others to confirm that). As Ron said, it will need to be rated generously to handle your ripple current. "X" rated compoents are often used.
At only 70V supply, you should easily be able to find a capacitor that will stand the full supply voltage so there would be no need for a transsorb or similar accross the capacitor.

You should also take note of TCMtech's advice, as he's got quite a lot of practical experience with inverters.
Although -
power inverters based on low frequency iron core transformers
I don't know if that applies here? If I'm reading the schematic correctly than the OP is using a ferrite core.
 
Here are some snippets from an interter circuit I was playing with recently - it's not directly relevent as this uses a half-bridge, not a full H-bridge like yours, but it demonstrates the idea.
In my case capacitive coupling was a must as a split power supply was not available. snip2.pngsnip1.png
In this case I could use polarised electolytics for the main bulk, as I had a standing DC across them - you won't. The coupling capacitors here are the "2x180uF"; note that they are bypassed with 100nF film capacitors for good HF performance.

This design was self-oscillating, using the current sensed across the 0R1 resistor to reverse the drive at a set current. The servo action was achieved by AC coupling the "Tx Return" node into the sense amplifier, meaning that the DC voltage on this node was pulled towards the voltage set by the 2 x 10k resistive divider.

In practical terms, depending upon how your'e generating your drive signals, you probably won't need any kind of servo action...

<edit>
What's an interter? Apologies for my poor typing/spelling.
</edit>
 
I don't know if that applies here? If I'm reading the schematic correctly than the OP is using a ferrite core.

Same effect will show up with that configuration at any frequency if the transformer L to load C ratios are not tuned to a frequency close to what the system is set to run at.

It's related to that pesky impedance matching issue that comes up with certain systems like this that use an LC tank circuit of sorts in their output stage to reshape a large blocky square wave based primary power input into a more sine wave like secondary waveform.

When done right a simple LC tank power circuit can compensate and clean up a huge amount of waveform distortion issues originating from the primary side of the system but when done wrong it can create some pretty strange effects that show up at odd times and in very odd ways under certain conditions as well. ;)
 
Hi,
i'm testing an inverter with these features:
Fswitching=220KHz
Fout=3KHz-10Khz
Vout=150Vac
Pout=150W
Current feedback.
Sinusoidal output is obtained with transformer leakage inductor+output capacitor.
In the figure below there is the schematic.

View attachment 105292

The problem is that a little DC component (about 100mA) put transformer into saturation and the output waveform has a distorsion as in figure

View attachment 105293


I don't understand from where it can come this DC component. Could you help me?

A capacitor could solve my problem? what features should have this capacitor? Ceramic or film cap? I had thought of 47uF@25volt as the voltage across it should never be too high.

Let me know.


Hi,

The reason for a small DC current in the primary could be simply because of a very slight difference in transistor turn on and turn off times and/or the Vsat for each transistor. This creates a DC current because the pattern itself has an average DC voltage offset.
It doesnt take much to saturate the core because of that DC voltage offset which because of the normally low DC resistance of the primary the current becomes great even with a small difference in pattern amplitudes and/or widths.
This can add a lot to the peak flux density which tends to ratchit up more and more over time.

One way to get rid of it is to integrate the primary voltage and use that as feedback. Your capacitor might work though, i have never had to do it that way. The cap has to be able to handle the RMS current.
 
One way to get rid of it is to integrate the primary voltage and use that as feedback. Your capacitor might work though, i have never had to do it that way. The cap has to be able to handle the RMS current.

Ok for the RMS current, but what about voltage? Can i use a low voltage capacitor? I calculate an impedance of about 1 Ohm @ 3KHz with a 47uF capacitor. The voltage drop shouldn't be higher than 3Vrms with 3Arms output current. Is it correct?
 
:facepalm:
Doh! I apologise - I'd been thinking about this in the wrong way (which is why TCM's comments didn't make sense to me initially).
I had been thinking of the transformer working at the switching frequency of 220kHz - the transformer (and any capacitor in series with the primary) is actually seeing the output frequency, which could be as low as 3kHz. Of course!

That does change things a bit, and explains why you where considdering such a large cap. Your calculations seem right to me, assuming that there is not much standing DC coming off the bridge in the first place - this will appear in addition to the voltage generated by the primary current (but if you're only getting 100mA of DC then this DC error can't be very big at all).

Hope I've not confused the issue with my misunderstanding.
 
Doh! I apologise - I'd been thinking about this in the wrong way (which is why TCM's comments didn't make sense to me initially).
I had been thinking of the transformer working at the switching frequency of 220kHz - the transformer (and any capacitor in series with the primary) is actually seeing the output frequency, which could be as low as 3kHz. Of course!

Yea it took me a long time to get my head around how that works too.

The biggest issue I see with the design is the output stage LC tank circuit is likely going to have a rather narrow frequency band (like cheating crystal oscillators base frequency up or down. It only goes so far before it won't work.) it will operate in without creating those odd peaks and dips in the primary signal waveforms so trying to get it to make a clean sine wave output over a 3 -10 KHz bandwidth may not work as it's presently designed.

Likely it may need a moderate value of resistance in series with the output stage capacitor plus have the value of that capacitor reduced to the bare minimal amount that can still filter out the higher input side PWM frequency but not create a dominant resonant harmonic within the working frequency range of the output stage.
 
Ok for the RMS current, but what about voltage? Can i use a low voltage capacitor? I calculate an impedance of about 1 Ohm @ 3KHz with a 47uF capacitor. The voltage drop shouldn't be higher than 3Vrms with 3Arms output current. Is it correct?

Hi,

Well, can you be sure there will NEVER be a short circuit on the output?

The voltage across the cap will go according to the total impedance reflected back to the primary, and the voltage division that comes from that consideration.

Is that output cap 20uf? It is hard to read if it is 20uf or 20nf.
If it is 20uf then there will be much more voltage across the 47uf cap because that 20uf will reflect back to the primary as a much higher value cap. If it is 20nf then mainly only the output resistance gets reflected back which means it is somewhere around 15 ohms on the primary. Thus we have a voltage divider made from a 47uf cap and 15 ohm resistor, and we care mostly about the voltage across the 47uf cap in order to figure out the normal voltage across it.

However, this does mean that we assume that there will never be a time when anything causes a higher voltage across that cap, such as a short on the output or some transient situation such as when the unit starts up. That could put the entire 70v across the 47uf cap although it would be for a short time. Thus there is some risk with using a low voltage cap. That also assumes there will never be any other load connected also. Of course if the core saturates then the cap sees more voltage then too because the primary impedance goes way down. This in turn means a slow start mechanism should be employed, but that's true of most modern converters anyway.

What you could do is start out with a 100v cap and work backwards. Look at the voltage across the cap with a scope. Pay attention to when the unit starts up and shuts down, and of course while it is running. That will tell you for sure if you can use a lower voltage cap.

Also be aware that caps can explode with incredible force when exposed to voltages that are higher than their rating. Much care in testing is required. The best bet is to hook up the test equipment first, then move back at least 5 feet before turning on, and of course eye protection. If you have to move the test probes, turn off, reconnect, stand back and then turn on again.
 
Core saturation from unbalanced current happens in a voltage mode PWM. (Where you drive duty cycle with out watching current)
In a current mode PWM each cycle terminates when the current reaches a set point. If the core heads into saturation the duty cycle change automatically to compensate.
 
Core saturation from unbalanced current happens in a voltage mode PWM. (Where you drive duty cycle with out watching current)
In a current mode PWM each cycle terminates when the current reaches a set point. If the core heads into saturation the duty cycle change automatically to compensate.

Hi,

Not sure what you are saying here. Arent most converters driven with an H bridge of transistors with no bridge current limit? Back in the 80's we later started to install hall effect current monitors in each bridge but before that there was no current monitoring. I think the majority of converters are built that way, with or without current monitoring.
 
but before that there was no current monitoring.
A voltage mode full bridge can slip into saturation if things are not perfect.
Adding some core gap should help some.
Adding a capacitor will balance the current.
or
Monitoring the current. A current mode PWM will keep the core from saturating in one direction.
example from what little information I can get on this project:
Voltage mode: The current might be 1.0A and 1.1A. (phase 1, phase 2) The high frequency current is 1.0A but the 100mA is at DC which is hard on transformers. (as I rethink things voltage mode might be called time mode because the "on time" is set by the error amp and is not related to current.)
Current mode: 1.0A, 1.0A The current must equal because the current is inside the "loop". ON TIME is the time it takes to reach 1.0A. The error amp might say "I want 1.0A please". That is the slow loop. The fast loop turns on a phase until 1.0A is reached. (how long that takes is governed by the magnetics not the IC)

Another way to thing about it; Because of saturation, the inductance of phase 1 will look different than phase 2. In voltage mode the IC will not know this is happening. In current mode the ON TIME is a function of voltage and inductance. The phase with high inductance (low current) will have its on time increased. The phase with low inductance (high current) will have its on time decreased. This should push the current(s) back from saturation.

I have used polypropylene capacitors in high current applications.
 
Hi,

That's not really what i meant :)

What i meant was that most converters are built to operate with a voltage output not a current output, and if you need a voltage output then you cant use a current output so there is little sense in talking about it.
Or did i misunderstand something ?
 
Well, there are a lot of converters (and other circuits) what use a "primary" control loop to generate a current, and a "secondary" control loop to vary this current in order to obtain a desired voltage at the output. Many small off-line flyback converters use this aproach.

I'm going to steer clear of saying too much about this as I'm not really qualified to do so but, as I understand it, the chosen aproach will have a bearing on how the system needs to be compensated for stability. A primary current-mode control loop (as described on #17) will give faster regulation of current but slower voltage regulation, and vice-verca if the primary control loop is voltage (or "time", as in #17).
So what I'm driving at is it probably depends on the end application/load as to which is the best choice of topology...

In practical terms, it probably depends on how far along franticET is with the design, and what other constraints there are on the design. A complete re-design might not be feasible.
 
As is be said there is no single universal inverter drive method that covers everything.

What works well in one operating condition is terrible in another.

I've seen many car audio power amplifiers and power inverters that use nothing more than a simple 555 IC based 45/45 duty cycle switching circuit drive system that ran power levels into the KW range without problems. Works great on low input voltage setups even at some pretty impressive power levels too. Downside is they have bare minimal voltage regulation due to the fixed duty cycle burst mode either full on or full off feedback loop setup. Bonehead simple with maybe 20 total components in play yet still stable and reliable.

In large high power industrial inverter systems they can get really elaborate with their control. I have seen many inverter based welders and plasma cutters that have full H bridge systems running or 350 - 750 VDC rail voltages that also use a large capacitor in series with the HF transformers primary. With that set up between using both PWM and VF control simultaneously on the H bridge the output stage voltage, current and overall power limit curves can all be precisely controlled regardless of what the load may be doing at any time. Crazy complex and often with hundreds of components on top of uC control to do what it does.

In some ways it's dang near still a black art in how any of them are designed and work. Some are so simple they don't seem like the should work and other are so complex you wonder why don't break down more than they do. ;)
 
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