IDeas for Phase Measurement technique

[Velec741]

hi all,
i'm doing a small project in order to measure the phase difference between two sine waves at 40kHz. i was wondering if any of you could suggest a simple circuit that can help me. i have to input two sinewaves of same frequency and differnt phase, do some kind of signal conditioning etc., and give it to a microcontroller in a compatible form.The output of the signal conditioning directly represents the phase difference. Any ideas ppl? any ic's available for this purpose?

 

[atferrari]

Sum of absolute differences is the name of that game

I am about to use phase difference in a circuit in a near future.

For the moment, what I have in mind (seen in somebody else's circuit) is to convert each signal (with an ADC) to a block of binary data for a certain period of time.

Then, several consecutive values from channel B are selected (we can call that a "window") and compared against all the values from channel A.

From the successive comparisons of that window, there should be one which has the smaller differences.

Knowing when the "window" occurred in time, allows you to know the difference in phase between channels.

Sum of absolute differences is the name of that procedure. SAD for short.

Absolute, I said.

Post the outcome. Interested myself.

 

[alec_t]

Simplest would be to apply each each sine wave (DC-shifted and amplitude-changed if necessary) to a respective CD40106 or other Schmitt trigger circuit to convert it to a square wave at logic level. Then use the micro to time the separation of the resulting pulse edges.

 

[dougy83]

I might use a zero-crossing detector (signal is AC-coupled into comparator with small amount of hysteresis) on each of the sine waves to convert to squarewave, then either:
* read those 2 signals with the uC directly & measure time difference between edges of the 2 signals, or
* feed those 2 signals into an XOR gate & read the resulting time difference between edges of the single signal, or
* if you wanted to use an ADC for whatever reason, then the output of the XOR gate can be filtered with a resistor and capacitor and then fed into the ADC

The zero-crossing method allows 2 signals of arbitrary amplitude to be used.

 

[Velec741]

just what i was looking for!
very good suggestions i must say...
considering all the reps, i dont think the one by atferrari would be practical because of the fact that the amplitude might be varying a little plus i guess i would need a fast ADC for converting a 40kHz signal. i'll be using only a modest microcontroller with a few MHz freq clk... interesting idea though
alec_t and dougy83, ur ideas seems to be a good bet... i would do away with the hysterisis and use an accurate zero crossing detector with an XOR... so i'm now left with a signal with a sort of PWM signal whose width is the same as phase diff right? i'm inclined to do the filtering to get a Voltage to give to the ADC cos i'm kind of a fan of ADC's in uC's(MUCH easier to program than timers). what i'm concerned is that if this would in some way increase errors... u know, error in adc's etc...(one of my prof's warned me all errors will add up and my whole proj will be utterly useless tats y...)
and one more thing ... will the filtering respond to changes in phase diff quickly enough? i need to get a steady state within a second to a step change in phase diff...
thanks guys...

 

[crutschow]

Averaging the XOR signal to get an analog signal has the advantage of being insensitive to frequency, since it responds to the average of the difference between the two signals, but you have to be aware of error sources. One is that it is sensitive to the digital output amplitude of the XOR gate. Thus you should use a CMOS XOR gate and power it from an accurate voltage source.

For a 40kHz signal you should be able to get an accurate response in one second by properly choosing the filter time-constant. It must be long enough so the ripple voltage is below the error level you need, and still short enough to settle to the desired accuracy in one second.

The critical design parameter is the phase accuracy that you require. Do you have a specification for that?

 

[dougy83]

Thus you should use a CMOS XOR gate and power it from an accurate voltage source.

The XOR supply doesn't need to be anything fancy; just use the ADC reference voltage as the supply (which will likely be VCC if you using the built in ADCs of the uC).

i'll be using only a modest microcontroller with a few MHz freq clk... i'm inclined to do the filtering to get a Voltage to give to the ADC cos i'm kind of a fan of ADC's in uC's

If the timer clock is 1MHz, there'll only be 25 measurable steps of phase value for 0-360 degrees, which may or may not be sufficient.

With a 10bit ADC you get a maximum of 1024 measurable steps (more steps if you oversample - it's actually set up quite well for oversampling as there will be a source of dither - albeit biased).

EDIT: you asked about the filter components; 4k7-ohm/1uF has a settling time < 50ms and is 60dB down at 40kHz (5mV ripple @ VCC=5V)

 

[Mr RB]

I was going to suggest what Dougy83 said but obviously he said it first.

So here's a PIC algorithm that can also do the job, assuming you have used zero crossing detect first (to get 2 digital waves);

Sample both waveforms at a regular period of any frequency, like a typical PIC interrupt at 19531Hz.
Then;
if A different to B add a count
if A same as B count does not change

Over any large number of samples count will give an accurate linear percentage of phase error between A and B. It is independent of frequency and can give very high resolution depending on total number of samples.

To know the direction of the phase error you need another test, as simpel as seeing which wave goes HI first, A or B.

 

[Velec741]

Mr RB, great inputs thanks however, would you say ADC method result would be close enough to the timer method? i'm really apprehensive about coding for timers since i had some big probs with a rangefinder project earlier :/ . I want to keep timers like a last resort...
crutschow,as for specs for phase diff accuracy, i would say (if i'm using a 16MHz clk) as close to (0.0625us/12.5us)*100 = at most 5% accuracy ... will the adc method acheive that amount of accuracy? (0-5V for 0-12.5us phase diff) (=sensitivity of 400mV/us phasediff )
any links/advice for simple error free averaging filter ckts? dougy83 does it need to be an active filter? cos i hav no idea abt averaging PWM signals....
thanks

 

[dougy83]

however, would you say ADC method result would be close enough to the timer method?

The timer method Mr RB gave is the clever digital version of the XOR + filter. At 20kHz sampling, I would think you can get a phase value from 0-1000 in 50ms. A 10bit ADC will give 0-1024 as the phase value w/ a setting time of 50ms (using the 4k7/1uF filter). The ADC version needs the extra hardware & using timers is actually very simple too. Both approaches are frequency-independent (within a range).

dougy83 does it need to be an active filter? cos i hav no idea abt averaging PWM signals....

Just a single resistor and capacitor will do. 4k7/1uF will do. I must say that I prefer Mr RB's method; you can use the uC internal comparators (if available) to reduce the required interface components to almost nothing

 

[Velec741]

ok... i'm in a dilemma here...
lets have a poll!
ADC method or TIMER method?

 

[crutschow]

So here's a PIC algorithm that can also do the job, assuming you have used zero crossing detect first (to get 2 digital waves);

Sample both waveforms at a regular period of any frequency, like a typical PIC interrupt at 19531Hz.
Then;
if A different to B add a count
if A same as B count does not change

Over any large number of samples count will give an accurate linear percentage of phase error between A and B. It is independent of frequency and can give very high resolution depending on total number of samples.

I would assume you do some sort of running average of the counts(?). For example subtract the new count value from the accumulated value and add a percentage of the difference to the accumulated value.

Then to get the phase error you would need to calculate the number of counts as compared to the total maximum possible counts in a period. Is that correct?

 

[crutschow]

Mr RB, great inputs thanks ..............
i would say (if i'm using a 16MHz clk) as close to (0.0625us/12.5us)*100 = at most 5% accuracy ... will the adc method acheive that amount of accuracy? (0-5V for 0-12.5us phase diff) (=sensitivity of 400mV/us phasediff )
any links/advice for simple error free averaging filter ckts? dougy83 does it need to be an active filter? cos i hav no idea abt averaging PWM signals....
thanks

In theory, if you use the A/D reference voltage to power the XOR gate, you could obtain 1/1024 * 180 degrees = .175 degree accuracy with the analog method and a 10-bit converter. In practice it's likely to be significantly less but you should be still be able to obtain better that 1 degree.

Note that the analog method does not tell you if the relative phase difference is lead or lag, if you need to know that.

 

[Mr RB]

I would assume you do some sort of running average of the counts(?). For example subtract the new count value from the accumulated value and add a percentage of the difference to the accumulated value.

Then to get the phase error you would need to calculate the number of counts as compared to the total maximum possible counts in a period. Is that correct?

Not exactly, what I was suggesting was to just do 1000 tests in total, and (in each test) if the 2 inputs are different then add a count.

So if the signals are in phase the count will be 0, if they are 180' out of phase the count would be 1000.

It does require that the duty cycle of both squarewaves are matching.

If the duty cycles don't match you can compensate that with a slightly more complex algorithm; Keeping two counts, before (B) and after (A);

waveA    __________/----------\__________
waveB    _______/----------------\_______

countB          111
countA                         111

Then if A=B the waves are in phase, so;
phase_error = A-B

 

[Velec741]

in my application, there is no prob of different pulse width for A & B... the freq will be a constant 40kHz....
Is this argument correct? my clock freq is 16MHz => 0.0625us ... meaning i can take only 12.5us/0.0625us = 200 values of phase diff... (=>resolution 0.0625us). so each clock pulse is very important.... so i cant afford to lose clock pulses during conditional statements etc...
but if i use the adc method, i can get a resolution of 12.5us/1023 = 0.0122 us... which seems 5 times better ...
so it seems to me that the ADC method will have lesser error due to quantization... but the only prob is lead/lag phase...

EDIT: correction: since i have to use 5V power supply from microcontroller, i'll be able to get a max avg voltage of only 2.5V since only 50% duty cycle or 180deg shift will be detected.... so the effective resolution will be: 12.5/(1023/2) = 0.0244us ... right?

 

[cachehiker]

A method we've employed is a bit different.

We can measure V. We can measure I. We can calculate the relative instantaneous VI as well as the rms V and the rms I. That means we can calculate the power factor as long as the sampling is at regular intervals that are not some small integer harmonic of 40KHz like 80 or 60 or 26.67 or 20KHz. We're sampling a 120Hz signal at (after filtering) just 2KHz.

The timing method would work well if we could fully eliminate the electical noise's effect on zero crossing detection.

The A/D method would work well if we implemented a bit of least squares curve fitting to calculate the zero crosses.

But, we know we're looking at phase lag from an inductive load so the power factor implies only one possible angle. And we know that we don't need the data any faster that a display can be updated. Performing a reasonable arctangent calculation accurate for a phase lag that's known to be between 5° and 50° once per second is enough to get us what we need.