IC 4013 Negative edge triggered ?????

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saurabh_m

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hi!!
I need support in designing a negative edge triggered D-flip flop using ic 4013. Can it be done?
Thanks
 
hi!!
I need support in designing a negative edge triggered D-flip flop using ic 4013. Can it be done?
Thanks

hi,
Why is it required that the 4013 be neg edge triggered.?

Do you have a diagram to post.?
 
Hi eric
the deal is i am making a circuit in which i have to detect that if line wire is carrying current or no and if its a no than my flip flop circuit( we will call it CIRCUIT 1) should be given a positive pulse so that it changes state. To cut the long story short. i have to reset another flip flop which is positive edge triggered. i have placed a shunt resistance in series with the single phase ac motor and from there i am able to generate a 10.4v AC, now when the motor starts no changes occur at circuit 1 but when the power is shut off the motor it should reset circuit 1, for which i need circuit 2( may be a negative edge triggered flip flop)thanks
 

hi saurab,
I would use a 2N7000 FET between the 'neg' pulse source and the F/F clock.

The gate of the FET being driven by the Hi to Lo edge and the drain to the 4013 clock, add a 10K pull up resistor from the drain/clock to +5Vsupply.
 
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