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How to calculate the value of a smoothing capacitor

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Hi there,

A good rule of thumb for the first trial value of the capacitor is (as nicely posted many times above):
dv=i*dt/C (with C in Farads)

however a simple empirical formula is:
Vpp=i*6000/C (with C in microfarads, at 60Hz)

which might give a more accurate value, and any calculation for a capacitor at 60Hz can be recalculated for operation at 50Hz simply by multiplying the value by 6/5.
Thus:
C(50Hz)=C(60Hz)*6/5

There is a catch to ALL the formulas however, and that is that the ripple has a lot to do with the capacitor yes but it also has a lot to do with the equivalent resistance of the transformer. A very low value resistance will mean you'll have to follow the formula dv=i*dt/C very closely, but a relatively high value (which is typical in some transformers) will mean you can cut the capacitor value in half. The series resistance acts as help in filtering the ripple so the capacitor can be reduced, and the reduction can be as much as one half the calculated value.
The only way to know for sure is to test your initial calculation and then try to reduce and see what happens, or try it with half the capacitance first and then double it if the ripple is still too high. This last idea is quite easy to do as you can order caps that are one half the calculated value and the simply add another in parallel if the ripple needs to be reduced further.
 
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hi Al,
Another point the designer has to consider is the peak current thru the transformer and rectifier diodes.
The higher the smoothing capacitor value the greater the peak diode current.
This current peak/spike can cause interference problems in analog circuits.
 
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Ahh there see now I have 2 formulas again

C = (I x t)/ΔV and C = (10xI)ΔV ... and two values totally different
- 125mF and 13mF

- an extra problem is that I can't seem to find a maplins capacitor rated this high suitable for use
This is really an old post. I read through all the replies, and there are no mention that the two equations provide the same answer, and to let you know.

Suppose I = 20mA and Ripple Voltage = 0.5V,

1) C = (0.02)(0.01)/0.5 = 0.0004F = 400uF
2) C = (10 x 20) / 0.5 = 400uF
 
I also arrived at this post late in the game, but for those who find this the way I did, here's a summary with clarifications and improvements:

* The current used in this calculation needs to be the highest current that will ever be drawn by the load. Set the design current to this value in all the following math.
* If the output of the filter is applied to a regulator circuit, then the ripple voltage must be such that the regulator input voltage never dips below it's minimum input voltage. For a series pass linear regulator this is determined by the regulator's dropout voltage [for a regulator IC, this can typically be found in the datasheet for that IC]. For a shunt regulator, this is determined by the shunt voltage [e.g. for a zener diode, this would be the zener voltage]. For a switching regulator, this would be the specified minimum input voltage [again, consult the datasheet].
* The time component is a function of both the frequency of the waveform [typically 50Hz or 60Hz -- though could be 400Hz or any other frequency], the rectifier configuration [half or full wave] AND the "gap" between the rectified [half] sinewave peaks. This gap [or valley] is slightly less than the period [1/frequency] because the rising and falling edges of the waveform overlap the region between the peaks. For higher ripple percentages, this gap is more narrow than for lower ripple percentages, but a good approximation is:

60Hz -- half-wave: 15.9ms full-wave: 7.6ms
50Hz -- half-wave: 19.1ms full-wave: 9.1ms

* The formula:

C = Ipeak*T/Vripple

This formula is an approximation. C = Ipeak*dt/dv is the precise formula, but the math involved is rather complex and not worth the slight gain in accuracy especially since you'll probably have to tweak it in the lab, anyway ;) Math will get you in the ballpark. A real world prototype will tell all [or at least "most"].

* The approximate formula in terms of percent ripple where percent ripple is defined as { PercentRipple = 100*0.707*VripplePeakToPeak/Vave } where Vave is the average output voltage [or intended output voltage]:

C = Ipeak*T/[PercentRipple*Vave/70.7]

Example:

Intended supply voltage: 24V
Rectifier configuration: full-wave
Line frequency: 60Hz
Acceptable ripple: 10%
Peak Current: 2.0A

C = 2.0A * 7.6ms / [ 10% * 24V / 70.7 ] = 4478 uF
 
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Well I guess by the date of the last post,, that this thread is dead.... But in looking over all the posts I see no where, that suggests percent ripple should be .707 * by 100 ??? ... as ReverseEMF's post shows .... also his example,, in doing the math,, his answer of 4478 is wrong.. The total thread how ever is vary good for giving one some in-site to a difficult subject...
 
3V is waaay too much, I'm talking about a 240VAC (UK Mains) Transformed down to 24DC Variable,
240VAC -> Transformer (24VAC) -> Rectifier (24DC /w ripple) -> Smoothing (24DC - 23.5V is acceptable) so I'm looking for a maximum ripple of 0.5V ~2% Ripple

So basically using the post below the time is 60Hz then the capacitor has to discharge for half of a cycle which would be ~ 8.3ms, so 0.5V for 8.3ms - is that enough information

First you said 10% ripple, later 2%. Do you realize when this happens the caps are only charged during 2% of the time and thus the average current is only 2% of the peak. This means your diodes and cap. ripple current is 50x the DC average.

Then your turn on Surge current will be even higher which places humungous demands for low ESR caps in ultracap sizes at ultracost prices.


Seriously, SMPS are much cheaper to make than this.

Anyone who tries to make 50 Watt 50 Hz DC power supplies with diode bridges and 2% ripple are roughly equal to that periodic chemical element, Unobtainium
 
This Thread is over 5 years old, the OP I would guess is well pass caring .:rolleyes:
 
I think your missing the point of the internet.. Yes the original poster may have gone on to other places, but 1000's of others are are just starting to google " smoothing capacitor calculations" .... Instead of each of the 1000 posting the same question, Its better just to add new in-site to this one... This thread has given me a better understanding of the concept and pitfalls... 5 years latter... and hopefully when I come back in 10 years I'll finally understand the concepts....
 
The important part is to have accurate advice to persuade new readers from repeating old mistakes.

The ripple amplitude is the same as the ripple duration and thus PEAK/AVG is inverse to Ripple, making 50 Hz Bridge Rectifiers very old brute force heavy expensive bad solutions due to extensive power filtering required to for high peak square pulse current when diodes turn on.

Of course ripple can be reduced by adding series resistance and then the ripple becomes generated by step loads ( Load regulation) rather than just pulsed charge current and slow drain. Analytically load regulation is the ratio of ESR in bridge, caps ( and transformer ) to load ( Rs/(Rs+RL)

As Rs , (total source ESR) goes to zero load regulation error goes to zero.

10% regulation error full load is even pushing component costs up dramatically.

Anything more is cost prohibitive in high power and SMPS are always lower cost unless 40% ripple and load regulation error is ok.
 
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Hello there,

In high current power stages with rectifiers another technique is to add a series inductor. The series inductor makes the current waveform distribute better over the entire cycle and thus reduces diode peak current and capacitor ripple current, and of course also reduces ripple.
The drawback is the inductor tends to reduce efficiency a bit, so the solution is to use a swinging choke. The swinging choke changes inductance as the current changes, where the inductance decreases (approaching saturation of the core) as the current increases so the efficiency gets better and better as the load current increases. There is always some inductance there though so the current waveshape goes back to looking more like a sine wave, more or less, and that reduces the ripple, the diode peak current, and the capacitor ripple current.
 
To The Ineffable All,

Wow, this subject has taken a lot of bandwidth and bytes, and I don't really see why. It seems straight forward, but maybe someone can show me different. For an example, I am going to use a half-wave rectifier and a 60 Hz power supply. It should be easy to adapt to a full-wave or 50 Hz supply. First, you simply decide minimum voltage you want to output in terms of the fraction of the maximum voltage of the power supply. This determines when the power supply starts energizing the capacitor. If the capacitor has de-energized below this minimum voltage before the power supply energizes it, either you have to increase the resistance of the load, get a larger capacitor, or accept a lower minimum voltage. OK, let's see how this works.

Below is the formula to determine how long it takes for the power supply to come up to the fractional minimum voltage. Also there is the formula to determine how low the capacitor de-energized at a given time. Using a fraction of 0.3 and a time-constant of 0.020 we get 0.0133 sec for the power supply and 0.0241 sec for the capacitor. That means that the power supply will energize the capacitor well before the voltage falls below the 0.3 fractional minimum. The time constant is the product of the capacitor and the load resistance.

By solving the two equations we can get a value of 0.499 fractional minimum where the two curves intersect.

If we want to assure a 10% ripple, specify the minimum fraction voltage of 0.90. That gives a power supply time of 0.01613 sec. A time-constant of 0.146832 is required to maintain that minimum voltage. If the load is 1000 ohms, then a capacitor with a minimum value of 150 uf will be required.
Voltz.JPG


Ratch
 
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Hi,

That's pretty close, i think the closer calculation is 127uf. This is because we actually have a little less time to the next cycle wavefront from the point where the exponential leaves the backend of the previous sine than we do from the previous peak so that makes the allowable cap value slightly lower. This is just an estimate too though, as it does not take into account the voltage ratio is no longer 0.9 either, but very slightly higher for a given 'fraction' of 0.9.
The breakaway point is when Is=0.

[LATER]
Ok, the most correct value is very very close to 146uf, so it's a little higher than what we get without considering the slight decrease in voltage before the breakaway point. So 150uf is a pretty good estimate for something like this.
 
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10% ripple means RC=10 * charge interval
20% ripple means RC= 5 * charge interval
2% ripple means RC = 50 * charge interval
1% ripple means 100T

Where T = 1/2f as the bridge doubles the input frequency

for a linear load R and filter cap C.


I assert for the cap that ESR(cap) << R(load) * % ripple²
and Rload *C [uF] >= 1 / (2f * %ripple )

But for non linear loads , i
t is the ESR of the load that counts not average R load.


This is how Ohm's Law translates into non linear sources and loads with filter time constants as the effective R ratio and duty cycle.

Tony
 
10% ripple means RC=10 * charge interval
20% ripple means RC= 5 * charge interval
2% ripple means RC = 50 * charge interval
1% ripple means 100T

Where T = 1/2f as the bridge doubles the input frequency

for a linear load R and filter cap C.


I assert for the cap that ESR(cap) << R(load) * % ripple²
and Rload *C [uF] >= 1 / (2f * %ripple )

But for non linear loads , i
t is the ESR of the load that counts not average R load.


This is how Ohm's Law translates into non linear sources and loads with filter time constants as the effective R ratio and duty cycle.

Tony

Could you explain what you mean by the above a little bit more? Or, better yet, send a link to something I can peruse. I don't understand the terms you are using, and how they relate to each other. For instance, does 10% ripple mean 10% ripple factor?

Ratch
 
% ripple = Vpp/Vavg x 100

Charge Interval = 1/2f as bridge is a freq doubler = interval between charge pulses. = 1/2 power line cycle
 
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% ripple = Vpp/Vavg x 100

Charge Interval = 1/2f as bridge is a freq doubler = interval between charge pulses. = 1/2 power line cycle

Charge interval defined above is for a full-wave rectifier. My example used half-wave rectifier.

How do you get the relation 10% ripple means RC=10 * charge interval? And ESR(cap) << R(load) * % ripple²
and Rload *C [uF] >= 1 / (2f * %ripple )
? Where does the square in % ripple come from?

Ratch
 
By test experiments over 30 yrs ago and intuition. If decay interval is x% of RC filter time. then sag voltage = x% ( = ripple%)
Therefore RC filter must be T/x for x =ripple % and T=1/2f for full bridge or 1/f for half bridge.

For unfiltered ripple charge rate is almost equal to discharge rate but as large Storage capacitance is increase, the charge duration gets closer to the crest of the wave and duration reduces and charge duty factor dictates the charge current is inversely proportional to duty factor yet rise in voltage is equal to droop and power loss in ESR is I^2*ESR therefore as %ripple is reduced power losses are squared so ESR of Cap must be lowered by square root of ripple factor .
 
By test experiments over 30 yrs ago and intuition. If decay interval is x% of RC filter time. then sag voltage = x% ( = ripple%)
Therefore RC filter must be T/x for x =ripple % and T=1/2f for full bridge or 1/f for half bridge.

For unfiltered ripple charge rate is almost equal to discharge rate but as large Storage capacitance is increase, the charge duration gets closer to the crest of the wave and duration reduces and charge duty factor dictates the charge current is inversely proportional to duty factor yet rise in voltage is equal to droop and power loss in ESR is I^2*ESR therefore as %ripple is reduced power losses are squared so ESR of Cap must be lowered by square root of ripple factor .

I read what you are writing, but I don't see any theory to back it up. Can you provide it, such as a link, a reference, a derivation? I don't know anyone who would design a power supply from the information you gave without some more explanation of what you are averring. Is there anything wrong with what I submitted?

Ratch
 
It was my own discovery, so I have not seen it anywhere else, results verified by myself as both R&D and Test Engineer at the time.

Your case of 10% resulted in a choice of RC= 146ms for a half bridge at 20ms, so your result is RC=7.5T vs mine RC=10T
 
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