How does this op amp Ramp Generator work?

[willsor]

Hi

For my Electronics syllabus, these op amp ramp generators often come up, and I'm still not sure exactly how it works. I know what it does, but unsure how.
It's got the equation:

ΔVout/Δt = -V[SUB]in[/SUB]/RC

But I'm still not sure what causes it to ramp up and down, If I were to guess, its something to do with the output charging up the capacitor and therefore slowly increasing the input. Is that along the right lines?

View attachment 64550

 

[ericgibbs]

hi,
If the input signal was say a continuous +/-V square wave, the capacitor would charge linearly to a +Voltage then down to a -Voltage.

If you have any circuit values please post, so that we can give a practical example.

 

[willsor]

It's not really in any specific circuit, but for example if the input was zero, then suddenly pushed up to +9v. Say for example if R=10kΩ and C=100nF.
The output would ramp down to -13v (assuming saturated from ±15v rails), but I'm not sure how it does this.

Thanks

 

[MrAl]

Hi,


It does this because there are a couple things in particular about an op amp and the nature of the capacitor that causes this to happen.
The op amp has its non inverting input connected to ground, which is like a reference terminal. The input voltage to the circuit is referenced to this terminal so that any voltage on the input is converted into a current flow through the resistor. That current is:
I=Vin/R

Now an op amp has a feature about it that allows it to generate a current between the output and the inverting (-) terminal. That current is equal to the current it gets into the inverting terminal except of opposite polarity. Since the input current is I, that means the current between the output and the inverting terminal is -I, which has to flow through a capacitor because that's all it has in the circuit between the output and the inverting terminal. If the input current I is constant, then the current between the output and inverting terminal will also be constant as long as the op amp operates within its limits.

Now the second principle here is that when a capacitor has a current flowing through that is constant the capacitor ends up with a voltage across it that is a ramp, so the voltage increases (or decreases) with time. That's how a capacitor responds to a constant current and that's just nature.

A third principle is that when the op amp is operated within it's limits, the inverting terminal voltage is kept equal to the non inverting terminal voltage. This is a concept known as "Virtual ground". This is just one aspect of the way an op amp works.

So we have a constant current input, and by nature of the op amp we have a constant current between the inverting terminal and output, and by nature of the capacitor we have a ramp voltage appearing across it, and by the concept of virtual ground we have the inverting terminal voltage equal to the non inverting terminal voltage, and since the non inverting terminal voltage is zero that means one end of the cap is at zero volts so the other end is ramping up or down, and that voltage appears at the output.

In mathematical terms this is known as an integrator. The output is equal to the time integral of the input. Since the integral of a constant is a ramp, we see a ramp output. If we instead vary the input instead of keeping it constant, the output is still the time integral of the input but it wont be a ramp anymore because the time integral of a varying quantity is not a ramp.

There are limitations to this though. If the input current is too high the op amp may not be capable of putting out enough current to keep the feedback current equal to the input current, and if the output voltage goes too high or too low the op amp may not be able to put out the required voltage due to power supply limitations and losses within the op amp output stages.
In addition to those limitations of the input and output levels, there is also a limitation in time that comes about because of the speed of response of a real life op amp. If the op amp can not force the output up fast enough to keep up with the required speed, the ramp will not rise as fast as it should for a given input and capacitor value. This limitation is known as the "Slew Rate" of the op amp, and the effect is similar to a perfect op amp that already has a small capacitor and resistor inside of it...any attempt to rise faster than those values will allow will result in these equivalent components limiting the output rise time. For example, if the op amps slew rate is 1v/us and we try to create a ramp that rises 2v/us it wont work because the internal structure of the op amp prevents it rather than the external components.

 

[Grossel]

It basically works like this:

Hi. Here is some hints on how the circuit works:

• The voltage between positive and negative opamp input is always (*1) close to zeero
• The above statement is true because that current through the resistor and cap is equal. The direction of the current too.
• Any voltage at input to the circuit that is different to ground will cause voltage of the output to rise (*2) with a constant speed (voltage per second), given that input voltage is constant. The more the input voltage differs from ground potential, the faster will the output voltage rise because the current through the cap increases.

*1 - This condition will not be true if the cap alllows to be charged up to the opamp's maximum voltage output capability wich mostly depends on the opamp's supply voltages. When this happens, the opamp cannot longer feed current (increase the voltage) to the cap and the voltage on the negative terminal will get close to input voltage after a time decided by the RC constant.

*2 - I say rise here, but I also mean fall. I don't want to make a long text just because of that.

Hope this make you understand the circuit concept a little better.

 

[willsor]

Wow, thanks for such a detailed explanation, both of you. I get it now
To be honest the whole concept of negative feedback was a little unclear to me too, but you explained that too
Thanks so much

 

[Winterstone]

Wow, thanks for such a detailed explanation, both of you. I get it now
To be honest the whole concept of negative feedback was a little unclear to me too, but you explained that too
Thanks so much

Perhaps it is helpful to know about another explanation of the integrating feature of the circuit.
The shown opamp with a feedback capacitor is known as a "MILLER integrator". Why this name?
Because it exploits the well known Miller effect to "enhance" the value of a capacitor.
In this context you must know that there is no ideal integrator circuit. Each opamp based integrator is in fact a lowpass with a very low cut-off frequency (typically 0.1 Hz or so). So, why not use a passive RC lowpass with a cut-off of 0.1 Hz?
For example with R=1.6 kohms and C=1mF (milli-Farad). As you will know such a large (high-Q) capacitor is not available.
Therefore, you can exploit the Miller effect by putting C=1µF (micro !) in the negative feedback path of an opamp (gain of 1000) or C=10nF if the opamp gain is 1E5.
This way you get a lowpass (cut-off of 0.1 Hz) function, which allows integration for signals above 1 Hz or so.
As another advantage, this active circuit provides a low-resistive opamp output. This is in contrast to the passive original, which would require a decoupling amplifier at the lowpass node.
In summary: The active inverting integrator is nothing else than a circuit that uses the Miller effect for capacitor enhancement (with the aim to avoid excessive capacitor values in passive RC circuits).

 

[WTP Pepper]

Don't forget this simple circuit will integrate it's own DC offset voltage of the op-amp (the +c value of any simple intergal) depending on the input signal which may result in a DC saturated output voltage unless the capacitor is discharged periodically.

 

[Winterstone]

Don't forget this simple circuit will integrate it's own DC offset voltage of the op-amp (the +c value of any simple intergal) depending on the input signal which may result in a DC saturated output voltage unless the capacitor is discharged periodically.

Yes, that is a well known disadvantage of this "very-low cut-off" lowpass. Therefore, in order to limit the dc gain, a resistor can be placed in parallel to the integrating C.
However, in most cases this opamp integrator is part of an overall dc stabilizing loop (filter and oscillator applications, control systems). In these cases, the circuit can be used as it is (without R||C) .

 

[MrAl]

Hi,

Yes i agree that a discussion about op amp integrators is not complete without considering that fact that there is no perfect integrator, and most of them in real life will have some drift that needs to be dealt with.
The op amp input offset voltage is one of those problems. With zero input voltage and 1mv input offset the equivalent input current would be 0.001/Rin, so if Rin was even as little as 1k we'd have an equivalent 1ua of current flowing. With a feedback capacitor of 10uf we'd end up with an output voltage of 0.1 volts per second, which is really quite significant because as soon as the circuit power is applied the integrator starts integrating.
With 100k feedback resistor added, the output is limited to 0.1 volts with 1mv offset, but the output wont really be a true ramp anymore.

Yes an integrator in the feedforward path isnt as bad a situation because the feedback tends to keep its input biased well enough.