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HI-TECH C and interrupts

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eng1

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I am using TIMER1 interrupts to create a long delay with a PIC16F723A.

The C code is simple and it is similar to the example in the manual of the compiler (example in the manual is for TMR0).
An example of an interrupt function for a Mid-Range PIC MCU processor is shown
here.
int tick_count;
void interrupt tc_int(void)
{
if (T0IE && T0IF) {
T0IF=0;
++tick_count;
return;
}
// process other interrupt sources here, if required
}
Code generated by the compiler will be placed at the interrupt vector address which will
execute this function after any context switch that is required.
Notice that the code in the interrupt function checks for the source of the interrupt, in

this case a timer, by looking at the interrupt flag bit (T0IE) and the interrupt flag bit (T0IF). Checking the interrupt enable flag is required since interrupt flags associated with a peripheral may be asserted even if the peripheral is not configured to generate an interrupt.


Code:
52:                // Interrupt Service Routine (ISR)
53:                void interrupt ISR(void){
   004    00FE     MOVWF 0x7e
   005    0E03     SWAPF 0x3, W
   006    00F7     MOVWF 0x77
   007    0804     MOVF 0x4, W
   008    00F8     MOVWF 0x78
   009    080A     MOVF 0xa, W
   00A    00F9     MOVWF 0x79
   00B    1283     BCF 0x3, 0x5
   00C    1303     BCF 0x3, 0x6
   00D    087F     MOVF 0x7f, W
   00E    00FA     MOVWF 0x7a
   00F    118A     BCF 0xa, 0x3
   010    28A3     GOTO 0xa3
54:                 if (TMR1IF && TMR1IE) {
   0A3    1C0C     BTFSS 0xc, 0
   0A4    28A6     GOTO 0xa6
   0A5    28A7     GOTO 0xa7
   0A6    28B8     GOTO 0xb8
   0A7    1683     BSF 0x3, 0x5
   0A8    1303     BCF 0x3, 0x6
   0A9    1C0C     BTFSS 0xc, 0
   0AA    28AC     GOTO 0xac
   0AB    28AD     GOTO 0xad
   0AC    28B8     GOTO 0xb8
55:                  TMR1IF=0;
   0AD    1283     BCF 0x3, 0x5
   0AE    1303     BCF 0x3, 0x6
   0AF    100C     BCF 0xc, 0
56:                  ++tick_count;
   0B0    3001     MOVLW 0x1
   0B1    07AC     ADDWF 0x2c, F
   0B2    1803     BTFSC 0x3, 0
   0B3    0AAD     INCF 0x2d, F
   0B4    3000     MOVLW 0
   0B5    07AD     ADDWF 0x2d, F
   0B6    28B8     GOTO 0xb8
57:                  return;
   0B7    28B8     GOTO 0xb8


Isn't the compiler supposed tp generate a RETFIE instruction (stack popped and GIE bit enabled upon return from interrupt)??
It should be evident in the disassembly listing generated by MPLAB, shouldn't it?


Any comments?
 
Last edited:
I suspect that at address 0xb8 it will have the context restore and a retfie.

Mike.
 
Yes, I found them.

I compiled a very basic program (only TMR1 interrupts) for the PIC16F628, so that I could use another application to get the disassembled code from the hex file.
Context saving and RETFIE instructions are generated correctly by the C compiler. After all I have always used interrupts with HI-TECH C compiler with no problems.

Not seeing them in the disassembling listing generated by MPLAB was quite confusing.
 
Last edited:
And of course if that were hand written assembly, all you would've needed would be this -

Code:
		cblock		0x70
				W_TEMP
				STATUS_TEMP
				PCLATH_TEMP
		endc

ISR		movwf		W_TEMP
		swapf		STATUS,W
		bcf		STATUS,RP0
		bcf		STATUS,RP1
		movwf		STATUS_TEMP
		movfw		PCLATH
		movwf		PCLATH_TEMP

		btfss		INTCON,T0IF
		goto		ISRExit

		bcf		INTCON,T0IF
		incf		tick_count,F

ISRExit		movfw		PCLATH_TEMP
		movwf		PCLATH
		swapf		STATUS_TEMP,W
		movwf		STATUS
		swapf		W_TEMP,F
		swapf		W_TEMP,W
		retfie

A lot less bloated than the compiled asm listing. ;)
 
Last edited:
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