Heplp needed in Frequency Doubler

[ikelectro]

https://www.electro-tech-online.com/custompdfs/2012/11/cd4046b.pdf

look on page 4 and 5. there are two charts you need to look at.... values of R1,C1 as a function of frequency, and values of R2 as a function of frequency offset... so 10k for R1, about 680pf for C1, and 1Meg for R2

Ok I'll do this also.........
thanks once again for having patience on me!!!

 

[MrAl]

Hi,

Oh yes, i meant to work on some design equations for your PLL circuit but didnt get a chance yesterday as i was involved with a number of things. I'll get to that today.

But if you like, what might be faster, tell me what frequency ranges you want to use and i'll work up a few values for you to start with. You already mentioned some in a previous post, but you seemed to have changed to another set.
So what i need to know is what you want to start with...is it 4Hz input and 1024Hz output or is it a different set? We can always change later too.

 

[unclejed613]

the other problem here is not understanding how this circuit works. if the VCO is set to free run at ~500hz, and the offset range isn't wide enough to track an input that would make the VCO go to 256 or 1024hz, the VCO will lock at whatever is closest to a multiple of the input, so if inputting 8hz would give 512hz, and the VCO can't offset down to 256hz or up to 1024hz, then a 4hz input would cause it to lock at the closest multiple WITHIN it's offset range, which would again be 512hz.

 

[MrAl]

Hello again,


Start by doing the test again, starting with a 4Hz input and trying to raise it to 5Hz and see if the output frequency goes up too.

If that doesnt work, here are some values gleaned off the data sheet for a 500Hz output and lock range about plus and minus 200Hz:

C1=0.1uf (however another data sheet suggests 0.01uf)
R1=100k to 200k
R2=100k

These values should get you up and running at least for now. Keep in mind however that the lock in range is only around 200Hz so that means your output can go from 300Hz to 700Hz at least in theory according to the data sheet. You may get better than that however.
These values where chosen based on Vcc=+5v.

Now might be a good time for me to ask what frequency range you intend to use this with in the end application. What output frequencies do you need this to lock at?

 

[ikelectro]

Hi MrAL,
Thanks a lot... My criteria is that whatever my input frequency is ( suppose n), then n frequency should be multiply with 128 at the output. thats mean if I give input a 1 Hz then output will be 128Hz, if my input frequency is 2 then output will be 256. So, 3Hz=384Hz,
4Hz=512Hz
400Hz=51200Hz.
999Hz=127872Hz. that is my highest frequency 999Hz. all should be multiply with 128 at output.
i think you see post no. 40, that is mine. the circuit i have been posted there is latest where my output frequency is not changing whatever the input frequency is....

 

[ikelectro]

Hello again,


Start by doing the test again, starting with a 4Hz input and trying to raise it to 5Hz and see if the output frequency goes up too.

If that doesnt work, here are some values gleaned off the data sheet for a 500Hz output and lock range about plus and minus 200Hz:

C1=0.1uf (however another data sheet suggests 0.01uf)
R1=100k to 200k
R2=100k

These values should get you up and running at least for now. Keep in mind however that the lock in range is only around 200Hz so that means your output can go from 300Hz to 700Hz at least in theory according to the data sheet. You may get better than that however.
These values where chosen based on Vcc=+5v.

Now might be a good time for me to ask what frequency range you intend to use this with in the end application. What output frequencies do you need this to lock at?

Ok, I done it, but output is almost 200Hz!!!

 

[unclejed613]

Hi MrAL,
Thanks a lot... My criteria is that whatever my input frequency is ( suppose n), then n frequency should be multiply with 128 at the output. thats mean if I give input a 1 Hz then output will be 128Hz, if my input frequency is 2 then output will be 256. So, 3Hz=384Hz,
4Hz=512Hz
400Hz=51200Hz.
999Hz=127872Hz. that is my highest frequency 999Hz. all should be multiply with 128 at output.
i think you see post no. 40, that is mine. the circuit i have been posted there is latest where my output frequency is not changing whatever the input frequency is....

you are not going to get that large a lock range (1000:1 max/min ratio) with a PLL or with any other method, short of going "full bore" and using a DSP system, which is much more complicated than even a PLL. you're just expecting too much. which begs the question: what are you trying to accomplish here? what are you building this thing to do?

 

[ikelectro]

you are not going to get that large a lock range (1000:1 max/min ratio) with a PLL or with any other method, short of going "full bore" and using a DSP system, which is much more complicated than even a PLL. you're just expecting too much. which begs the question: what are you trying to accomplish here? what are you building this thing to do?

then is it possible input frequency 60Hz to 400Hz?????

 

[ikelectro]

Here is another question is the multiplication can be done with a Binary rate multiplier like CD4089?????!!!!

 

[MrAl]

Ok, I done it, but output is almost 200Hz!!!

Hello again,

I am afraid you will have to explain a little better. You said that you have 'done it', but my suggestion was many fold in nature suggesting several different things such as a range for R1 and also a simple test with the present set up and component values.
So from here on you have to specify what component values you have used and what circuit you use if you change that too. So far i havent suggested changing anything other than R1, R2, and C1. So you need to specify what values you used and what test you did.

The simplest test is to try to lock, period. We want to see it lock. To see this you need to use a frequency like 1Hz (as you have been doing) and assuming you have the correct divide ratio set with the counter (128) we expect to see 128Hz output and as you change frequency of the input BY A SMALL AMOUNT we see the output frequency change to follow that input change. So for now just go from 1Hz to 2Hz, but you could also try 2Hz to 3Hz, as a separate test. Of course 3Hz to 4Hz too, just to see if any of these ranges allows a lock.
To get it to lock we have to have the VCO frequency set right. Unfortunately the data sheets vary a little on what the proper resistor values are to be, so we have to experiment a little (for now). I've now located a better set of data (as per the other thread with the CD4046) but i have to go over that and come up with a model of the VCO before i can use that, so it's going to take a little time to accomplish this task.
But in the mean time you can take note that if you change R1 you should be able to change the VCO center frequency (that's with the input to the VCO equal to 2.5v in a 5v system) So if you set the input to the VCO to 2.5v you should be able to adjust the output frequency using R1 to get it to be (say) 128Hz, and this should allow locking on a 1Hz input signal.

You should also realize that there is a little more to this than some other electronic circuits so it may take little time to experiment and get the right values. However, it may not be possible to lock on such a large range like you seem to want (1Hz to 1000Hz input) as unclejed pointed out. If it does work, it will require changing the input frequency SLOWLY to allow the output filter time to keep up with the changing signal.
I should also point out that i've never worked with a PLL that had to lock in with that big of a range. Typically you see 10 or 20 percent deviation from the nominal input frequency. So with a 100Hz nominal input you may see 80Hz to 120Hz or something like that. But it should be interesting to see how far we can take this.

So what you should do next is set the VCO input to 2.5v with perhaps a voltage divider, then change R1 until you get a 128Hz frequency output, then remove the 2.5v source and hook the circuit back up normally, then input 1Hz and see if you can SLOWLY change to 2Hz and see the output frequency go up SLOWLY a little at a time, like from 1Hz to 1.2Hz, see the output go up a little, then 1.2Hz to 1.3Hz, etc., watching the output.
Let us know how this test goes, and if it doesnt work, try those new values i posted.
Also, be sure to specify exactly what values you used and what you did and what happened.

 

[ikelectro]

Hi, MrAl
View attachment 68954
in this circuit if the input frequency is 512Hz then the out put goes to 4Hz in display. pin no 2,3and 15 are set like that way to avoid flickering.. if my input frequency is 512Hz and output is 4Hz, so if i want to show the exact figure and that is 512Hz, then I have to multiply the input frequency with 128, then I'll be able to see the figure 512Hz, or if the input is 999hz then I'll be able to 999Hz. so that is why i have to multiply the input frequencies before it goes to clock( pin 1) of CD4026.
so the multiplication should not be too slow for counting!
so will it be right to use the 4046 (according to your last post this will take time)???.. but I'm not sure.

 

[MrAl]

Hello again,

But did you get ONE stage working yet? You should concentrate on getting one stage working with ANY frequency just so you can see how it works and we can take it from there. Did you try the two 100k resistors yet and 0.01uf cap?

I was going to suggest using three 4046's in series but i dont think that will work after all.

 

[ikelectro]

Hi, MrAl,
I have just go through the R1 as 100K, R2 as 100k and C1 as 0.01μF. and my input frequency at pin no 14 is 2Hz. and I remain the same components values as you stated in your diagram which you posted here under Phase locked loop. I also take the pin 4 of 4046 to the clock of 4040 and give the feedback from pin 13 of 4040 to pin no 3 of 4046
and now my output frequency is 2.35KHz!!!

 

[MrAl]

Hello again,

Ok, so we are seeing an output of around 2kHz. But did you disconnect pin 9 and input 2.5v to do this test?
I am assuming you are using a 5v power supply (regulated) but is that what you are really using?

To do this right you have to disconnect pin 9 of the 4046 and input approximately 1/2 Vcc to that pin. That's to get the VCO at very roughly half frequency. The idea then is to either adjust C1 or R1 to get the right frequency. R2 sets the 'offset' frequency so that may need adjustment too.

If you keep the values of R1 and R2 the same, you'll get max frequency about two times the min frequency, so for now maybe keep them the same value.
Increasing both of these resistors (and maintaining this relationship) will DECREASE the frequency. Decreasing these resistors will INCREASE the frequency.
But the best bet is to input one half of the supply voltage to pin 9 after disconnected it from the other R and C network. This help set the center frequency.
Try that and then see if you can adjust the output frequency for what you want to start with, like say 500Hz.

We still havent figured out how you are going to get a huge lock range like you wanted however. To do this you may have to use a couple different ranges and that means either swapping chips digitally or doing this some other way.

 

[unclejed613]

so i'm slowly getting a picture that the OP is looking for some kind of reverse prescaler for a frequency counter? ike, is this what you are trying to do? there may be other ways of getting an accurate count of the frequencies you're trying to measure, such as lengthening the gate time on the frequency counter....

 

[ikelectro]

HI, MrAl
After giving 2.5V to pin no 9 the output frequency is 1.622KHz.

 

[MrAl]

Hi,

Ok good. Now before we go any further, is it true that you are using a supply voltage of +5 volts, and also, what is the EXACT part number of the chip you are using (the 4046 full part number you are using including all prefixes and all suffixes) ?

 

[ikelectro]

Hi,

Ok good. Now before we go any further, is it true that you are using a supply voltage of +5 volts, and also, what is the EXACT part number of the chip you are using (the 4046 full part number you are using including all prefixes and all suffixes) ?

Yes, I'm using Regulated +5V DC supply and the part No. is HEF4046BP (from NXP)
L1D7H1 01
Ung11294

 

[MrAl]

Hi again,

Ok great. So now you have 2.5v in put and 1.6kHz output, and dividing 1.6kHz by 128 (your divide ratio i presume still exists) gives us 12.5Hz.
So you should be able to reconnect pin 9 the way it normally connects and use a 13Hz input signal and obtain a lock. To see if this works, input 13Hz and then measure the output frequency, then turn it up a little, like say to 15Hz, then down to 11Hz, and see that it stays locked as the output should follow the input signal by changing frequency by the same ratio as the input.
Also, because R1=R2 for now, we should be able to observe a lock from about 7Hz up to about 19Hz, but possibly no more than that, or possibly a little bit more than that. So you can try that next. First make sure you get the lock at 13Hz input though to make sure it locks at all first, which we need to verify. Then if that works you can try sweeping from 7Hz to 19Hz and see if it maintains the lock. If it doesnt, try to determine where it looses the lock on both ends, upper and lower. For example, it may only make if from 8Hz to 18Hz or something like that, or it may make it from 5Hz to 20Hz or something like that.

So to recap, see if it locks at 13Hz input first. Make sure to try that first because if that doesnt work then something else is wrong that we'll have to look into.

You'll also have to decide if this is still the way you want to implement this project, which means using not just one 4046 chip but possibly as many as four chips with different value resistors, and then switching which range you want to work with using digital logic gates. If you dont want to do it this way they you'll have to find another method which may or may not use 4046 chips.
Other methods include possibly using a digital pot to change the resistance values, but that could get pretty complex. The digital logic gates method is a sure fire technique, but again there are other ways to do this.

 

[ikelectro]

ok, this is working i think, but frequency range is to small for me. because my input frequency will be vary from 60Hz to 400HZ ( approx). then I think this will be not a good idea about going with 4046... what do you say????
i think that'll be more complex goes with 4 nos of 4046 for like me who is new in this field!
will it be more fun to go with digital logic gates? what do you think???
can you show me the path to do it with digital logic gates!!!
thanks again.... for your active responses to my posts.........