The below is a part of project
* 18 bit down counter ,it should act as clock divider
It is necessary to use a relatively fast clock to drive the whole system so that it can respond
quickly to button presses by the user. However, the moving display must run at a much slower
and changing speed. To achieve both these aims it is necessary to have a clock divider.
Create an 18-bit down counter to act as a clock divider to produce a suitably slow clock enable
signal from a 500 kHz clock. The clock enable signal (ledCountEn) should be only one clock
period in length. Add this to part 3 and use it to reduce the speed of the up/down counter.
please guys write the vhdl code and send me it to this mail id :saisatish63@gmail.com
* 18 bit down counter ,it should act as clock divider
It is necessary to use a relatively fast clock to drive the whole system so that it can respond
quickly to button presses by the user. However, the moving display must run at a much slower
and changing speed. To achieve both these aims it is necessary to have a clock divider.
Create an 18-bit down counter to act as a clock divider to produce a suitably slow clock enable
signal from a 500 kHz clock. The clock enable signal (ledCountEn) should be only one clock
period in length. Add this to part 3 and use it to reduce the speed of the up/down counter.
please guys write the vhdl code and send me it to this mail id :saisatish63@gmail.com