Was wondering if anyone could shed some light on EPP parallel port instruction timing. Everything I read indicates maximum port transfer speeds of 2 mega-bytes per second which, (if I am calculatind it correctly)
gives an instruction cycle time of around 500 nano-sec. I have observed my port being able to run in the <200 nano sec range. I cannot tell exactly how fast the fastest cycle is because my O-scope is old and min setting is .2us/div and has no trigger delay capabilities, so I cannot display the entire trigger event. I have been able to successfully loop data thru the port at ~300 nano-second cycles, but my timing setings starts to get more critical. Is this speed normal?
I have a P-3 1.4 ghz system and am running FSB bus up at 140 MHZ. Are my observed results due to the overclocking of my system?
Thanks
Dialtone
gives an instruction cycle time of around 500 nano-sec. I have observed my port being able to run in the <200 nano sec range. I cannot tell exactly how fast the fastest cycle is because my O-scope is old and min setting is .2us/div and has no trigger delay capabilities, so I cannot display the entire trigger event. I have been able to successfully loop data thru the port at ~300 nano-second cycles, but my timing setings starts to get more critical. Is this speed normal?
I have a P-3 1.4 ghz system and am running FSB bus up at 140 MHZ. Are my observed results due to the overclocking of my system?
Thanks
Dialtone