Does SDRAM work at lower than spec frequencies?

[sleeper1987]

Im looking to interface some SDRAM with a microcontroller, which operates at 66MHz. Will SDRAM advertised as 143MHz work at this lower speed?

I've always believed that clock speeds were just guaranteed maximums, but I've just read that some DDR SDRAM requires a clock near the spec, as they make use of a delay-locked-loop that only works over a narrow bandwidth. Is that the case here?

The sort of chip I'm considering

 

[unclejed613]

it should... operating RAM at higher than it's max clock rate has always been a problem, but operating it at slower speeds isn't a problem. Ram needs a certain amount of time for valid data to be stored. less time (higher frequency), and the bit states don't have time to stabilize, which causes errors. digital pulses actually do not have perfectly "vertical" leading and trailing edges, but have a linear slope (i've heard it said that "there's no such thing as a true "digital" signal"). CMOS memory cells are basically capacitors connected to switches. if the capacitor isn't given enough time to charge or discharge to a valid logic level, it remains somewhere in between (called an "undefined state") and whether it's read as a "1" or "0" is mostly a matter of chance, and the data is unreliable. if operated at lower than the rated speed, the data has plenty of time to reach a valid logic level. also, a side benefit is that the memory chip runs cooler. the reason they run cooler is that CMOS devices require almost no current when at a defined logic level, but do draw current during the transitions between 1 and 0. the transition time remains the same, but at higher speeds, the time spent in a defined state is proportionally shorter, and so the heat begins to build up.

 

[mneary]

You're wise to sense the risk of a minimum speed, especially since there's no sign of this on the data sheet. This is a dynamic RAM and there is a minimum speed. It's a good idea to check the app notes - I've found gems and surprises hidden there. Sometimes it's in the notes for a similar part. I've seen some vendors of 'identical' parts posting minimum speeds when their competitors ignore the issue.

One thing that strikes me in the data sheet is their fascination with 'clock suspend' mode, where the clock runs at the rated speed but CE is toggled, in effect running the bus at half-speed. It shows up in a couple of places. Makes me wonder....

Also consider refresh. At a slower clock speed will there be enough refresh cycles?

@unclejed613 - nice discussion about CMOS static RAM, but this is a dynamic RAM. Almost nothing in common between the two.

 

[sleeper1987]

Hi guys, thank you very much for the replies. Mneary - you make a good point about refresh cycles - although it does seem ridiculous to think that the charges won't hold for longer than 1/66'000'000 of a second! Anyway, I'll probably have to stick to static RAM, in that case.

Thanks again.

 

[Speakerguy]

Look into Micron Cellular Ram, also known as Pseudo SRAM. It is a self-refreshing DRAM that interfaces like SRAM. The refresh operation is totally self-managed. So you get densities of DRAM, but simplicity of the SRAM interface. And no lifecycle issues like with flash. Asynchronously it's only about 70ns access time, similar to NOR flash, but can be operated in synchronous burst mode at up to 133MHz easily. So you take an access time hit on the first read/write, but after that it's 133MHz for reading/writing large blocks. I'll be using it at 100MHz, but due to the built in self refresh the 66MHz should be no problem at all. Also fairly low power.

It's an interesting product. I'm planning on using it with an ultra low power TI DSP on a work project I'm doing (TI C5505).

CellularRAM memory is a pseudo-static DRAM (PSRAM) device that features an SRAM-like architecture, hidden refresh operation, and SRAM pin-compatibility. This hybrid memory delivers the best of SRAM and DRAM features, combining low power consumption and high-speed READ and WRITE functions. It’s an ideal solution for low-power, space-limited mobile designs and MCPs.

**broken link removed**

 

[sleeper1987]

Hey speakerguy79, thanks for the response.
PSRAM does look interesting, but unfortunately I'm limited to buying from farnell, which doesn't stock it. Thanks though, I'll keep that in mind for future projects.

 

[mneary]

Hi guys, thank you very much for the replies. Mneary - you make a good point about refresh cycles - although it does seem ridiculous to think that the charges won't hold for longer than 1/66'000'000 of a second! Anyway, I'll probably have to stick to static RAM, in that case.

Thanks again.

Refresh isn't about holding the data for one clock cycle. The RAM is divided up into 4096 refresh sections (Rows), and every row needs a refresh cycle in a specified time frame. In this case, at the top level it needs 4096 refresh cycles every 64 milliseconds. Refresh cycles don't just happen; they must be executed just like Read and Write commands.

This RAM would be difficult to control with a microcontroller, unless it has a built in SDRAM controller. You don't just give it an address and read it. Look at the procedure just for reading a location.

I think you would be happier with static RAM.

 

[nigelwright7557]

Im looking to interface some SDRAM with a microcontroller, which operates at 66MHz. Will SDRAM advertised as 143MHz work at this lower speed?

I've always believed that clock speeds were just guaranteed maximums, but I've just read that some DDR SDRAM requires a clock near the spec, as they make use of a delay-locked-loop that only works over a narrow bandwidth. Is that the case here?

The sort of chip I'm considering

Static RAm can work down to zero hertz.
Its dynamic RAM that needs to be refreshed on the fly.

 

[sleeper1987]

Mneary - Thanks for the continued interest. You're right - I'd forgotten that the cells need refreshing individually.

Incidentally, my uC does have an SDRAM controller, so that wasn't going to be a problem. I've opted for external flash memory in the end - durability and speed are less important to me than capacity. Also, debugging is easier as I can just connect the card to a PC!

Thanks again.