Continue to Site

Welcome to our site!

Electro Tech is an online community (with over 170,000 members) who enjoy talking about and building electronic circuits, projects and gadgets. To participate you need to register. Registration is free. Click here to register now.

  • Welcome to our site! Electro Tech is an online community (with over 170,000 members) who enjoy talking about and building electronic circuits, projects and gadgets. To participate you need to register. Registration is free. Click here to register now.

Digital system

Status
Not open for further replies.

EngIntoHW

Member
I got 2 motion sensors in a corridor (the corridor leads to a room), one follows the other.
Each sensor outputs '1' when it detects a person passing beneath it.

I need to design a system that determines when the room is empty, and when it isn't.

I already sketched the state diagram, I just don't know what memory units to use.

I can't use synchronized memory units right? (meaning, memory units with clock input).
As I wouldn't be able to guaranty Tsetup of each input.

So what memory units do I use?
 
Last edited:
How about using set/reset latches (or the set/reset inputs on a FF). That doesn't require a clock.
 
Got it, thank you :)

Is it possible to design the machine by DFFs, and then just convert each DFF to RS latch?
by:
Ri = NOT(Di)
Si = Di
 
Last edited:
The reason for a clock is to insure that the logic decisions occur in the proper sequence to avoid race conditions (a logic signal appearing at the incorrect time). You would have to analyze the logic flow to insure that a race condition does not occur when you convert from clock logic with DFFs to asynchronous (non-clocked) logic with latches.
 
Status
Not open for further replies.

New Articles From Microcontroller Tips

Back
Top