Digital Potentiometer beyong supply voltage

[JoeWawaw]

Hi,
I have a SMPS circuit where the output voltage is regulated by adjusting the resistance in a voltage divider . The FB pin has a Vref of 0.6V, and it regulates Vout such that FB remains at 0.6V. To adjust the output voltage from 3-9 V, I used a digital potentiometer (MCP4131).
Its come to my attention that D Pots cant handle voltages higher than its supply voltage, which is what I've been noticing on my circuit (around 5.5V for Vout was the max).
I'm trying to find a workaround for this problem, and nothing practical has come to mind (i considered putting the pot on the lower side resistor, but the equation then becomes an inverse function, and as i approach 9V the slightest change in resistance would sway the voltage)
The output voltage equation for this chip is: R2 = R1( (x/0.6) -1 ), x being the desired output voltage, R1 the resistor between Vout and FB, and R2 between FB and GND.
Any suggestions?

 

[Diver300]

This assumes that Vref is 0.6 V to ground.

Set the resistances of the voltage divider to give you the top voltage, 9 V.

Now connect the digital potentiometer between 0 and 5 V, so that it gives you any voltage in the range 0 - 5 V.

Connect a resistor between the digital potentiometer wiper and the FB pin. I will leave you to work our the value as it depends on the voltage divider resistance. The value should be set so that 5 V out of the digital potentiometer, along with 3 V on the main output gives you 0.6 V on the FB pin, while 0 V out of the digital potentiometer along with 9 V on the main output also gives you 0.6 V on the FB pin.

In fact, the simple voltage divider will give you a voltage slightly less than 9 V. I think it will be 8.28 V. You need to work out resistances that get you the correct feedback voltages at either end of the range.

Now when you put the potentiometer to the top, you will get 3 V, and when you put it to the bottom, you will get 9 V. Control will be linear in between these two points.

 

[ronsimpson]

Using what Diver300 said:
U1 is the power supply.
R5, R4 is the digital pot. I have it changing from (R5=10k to 10 ohms and R4=10 ohms to 10k) Spice will not allow 0 ohm resistors.
R1,R2 is set for 9V.
The bottom of the pot is jacked up by 0.6V. This way then the pot is set to the bottom end there is 0.6V on each end of R3 so R3 has no current and does not exist.

The output is not linear but...
Pot set to step from 0 to 20% to 40%.....100%

 

[Diver300]

Thank you for that, Ron.

I assume that the lines are every 10% from 0% to 100% as there are 11 of them.

I think that the output would be more linear if R1, R2 and R3 were large compared to the potentiometer resistance. Can you run the simulation with those three resistors 10 time the existing values?

 

[ronsimpson]

Cut the POT to (1k to 1ohm).

---edited---
Thin I tried increasing the other resistors by 10X and it is even more linear.

 

[ronsimpson]

Now the POT resistance is out of the circuit.

 

[JoeWawaw]

thanks for the answers, but i forgot to mention that its a pcb circuit thats already been manufactured.... and so adding op amps and a number of resistors is out of the question here.
I thought about it this morning, and i figured i could place a resistor in series with the potentiometer... i cant upload images for some reason, but heres what it looks like:
---------R-----------DPOT------------R2
Vo ---/\/\/---o---/\/\/\/\/---o---/\/\/---GND
----------------------------------FB
And so now, the voltage across the pot is reduced below 5V for my Vout range
Does this seems like a good solution?

 

[ronsimpson]

This is my first try, which I delete.
R4 is the pot, using 2 pins not 3 pins!
Problem is that the top of the pot gets to 6.5 volts!
The output voltage goes to 9.46 volts so don't use the last couple of steps, to limit to 9.0V.
R1,R2 sets the 3.0V. R1,R4,R2 sets the 9 volts.

 

[JoeWawaw]

For now, im going to only make the output voltage range from 3-6.0V, so that problem will be eliminated.
FTR, im using R2 = 3300, R1 = 10k, and the DPOT is 0-50k