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Designing CMOS Analog Switches... Driving me crazy!

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saianel

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HI everyone,

It's the first time I post in this forum, and I would highly appreciate someone helping me out. I am trying to build a CMOS analog switch in Multisim 10; I am using the model shown in Figure 1 in the following link:

**broken link removed**

I've also looked at other sources, and this model seems to be pretty standard. My objective is simply to control a switch with a digital signal to either block (open switch) or let pass (closed switch) an AC signal. I am simulating the digital input with a clock input.

I have been trying to find the bug in my circuit, but it doesn't seem to like any of my suggestions; thus, I need someone else to look at it and hopefully help me find where the error is.

I attach a couple of images of the simulation including the circuit and oscilloscope measurements.

Figure 1. Modelsim Circuitry

**broken link removed**

The following figure displays the output of both transistors wired together as shown in the modelsim circuitry.

Figure 2. Vout (as shown in circuitry) vs. Clock Input

**broken link removed**

The following two images display the ouput of the transistors isolated from each other.

Figure 3. N-channel output V vs. Clock Input

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Figure 4. P-channel output V vs. Clock input

**broken link removed**

Something that was noticeable for me is the fact that the total output (Figure 1) and the N-channel results (Figure 3) look identical. Aditionally, the


I APPRECIATE ANY HELP YOU GUYS CAN PROVIDE!
 
How did you manage to get the sim to isolate the internal diode of the FETs? The diode is an integral structure, and is represented schematically as being connected to the source lead. Your schematic has the FETs in antiparallel. Why?
 
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