Hi again,
I tend to over complicate things, so don't take this idea too seriously.
The simplest way I can think of uses a decade counter and a shift register. The shift register can be a serial to parallel type, or you could omit this altogether if you wish to have a serial output (you'll still need a single 'buffer D-type flip flop for the outpu, and a clock for the serial line, more on that later).
Basically, the output of your comparator, is the input to the shift register. Using the decade counter (driven by a clock) with its output connected to your R2R DAC, it will turn on each 'bit' consecutively. If its too high your comparator will tell you, (depending on how you configure it) say a 0 is 'too high' and a '1' is too low. So, you send a clock pulse to the decade counter (4017?), then clock in the output of the comparator into the shift register. You could use the same clock, but invert it for the SR so it clocks in a bit on the falling edge, whereas the counter will clock on the rising........with me so far?
Now, you would need to make sure that if a 'bit' is giving 'too low' as its reading, that it stays on (1), or if its too high, then it turns off (0) after checking each bit. You could use latches for this, although these would need a clock as well.
As your decade counter does its thang, your shift register will fill up with each bit, a '1' for too low, and a '0' for too high. After 8 clock pulses (for 8-bit resolution) you'll have your 8-bit result stored in the SR
Hmm I just winged that and its seems even simpler than the original idea, even at 3am. Its hazey, and not complete, as you must make sure that each bit of the input to the DAC remains '1' if the output of the comparator is 'too low'. You *may* be able to do this using another shift register, I'll think about it tomorrow.
Good luck, I need sleep.
Blueteeth