Deadband for op amp / comparator circuit

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jnnewton

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I'm trying to create a deadband for a circuit. there are two inputs, a command signal and a feedback signal. They are both for positioning a motor. The motor runs through a gearbox and the output is verrrrry slow. So, i think i can avoid a full blow analog to pwm h-bridge, if i can get the fwd and reverse to both be off around the 0 error point. I have a circuit that is giving me the problem. The problem is, I can't get the deadband to align around the zero point. Please see the attached schematic and outputs. Thanks for looking.
 
That's what I had at first, based on that circuit / thread actually. But my problem was that because the setpoint voltage moves, and can't figure out how to take care of the "everything is zero" case. I've attached the outputs i'm getting in sim. So i started to go more complicated, and I do have something that works, but it's nasty, and probably not very robust. I can post that in a min.
 
At the moment you have a window comparator with variable thresholds. I'd suggest setting to the thresholds to constant voltages, and then feeding the CMD and FB into an error amplifier which then feeds into your window comparator. This way, when the error (FB - CMD) is more than the high threshold or less than the low threshold, the motor will turn one direction or the other, but if the error is close to 0 (within your window), then neither comparator output will be active.
 
That's what the nasty one i was talking about sort of does, but it also has to 1) find the absolute error (single supply circuit) 2) not a window, but just a comparator with a "error threshold" 3) digital logic to compare this to which is greater, cmd or fb gets the output. I was looking for something simpler.
 
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Single supply circuit.

case 1: fb > cmd -> error > 0
case 2: fb < cmd ->error = 0

So, if low limit is say 0.1V and high limit is 0.2V, and the fb is perfectly aligned with the cmd, you would want the motor off, however, it would not be because fb = cmd -> error = 0 < 0.1. could you post a schematic of what you are thinking? maybe i can add the error to 1/2 vdd and set lims above and below that
 
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