counting from 1 to 9

[korbac]

using a 74ls193, how do you make it count from 1 to 9 then go back to counting 1 to 9 again? i made it count from 1 to 9, but after 9, it goes back to 0. can someone help me please?

 

[hjames]

Do you know how to use the 'load' pin?

 

[AllVol]

using a 74ls193, i made it count from 1 to 9, but after 9, it goes back to 0. can someone help me please?

What are you using for display?

It seems odd that you can get 1 to 9, since the 74LS193 counts 0 - 15.

The 74LS192 is the decade (0-9) version.

Please clarify.

 

[Papabravo]

Decode the value 9 = 1001
Activate the parallel load pin, NOT the RESET(CLR) pin
Set the inputs to 0001
Tie RESET inactive
For extra safety decode 0x9 thru 0xF to activate the parallel load. That way any illegal counter state leads to a valid state on the next clock transition.

 

[korbac]

well, i'm using a 7 segment LED for display. actually, i wanted to make it work like a clock. on the next count after 12, it goes back to 1. but i find it a bit hard. it requires a lot of logic trapping(is this what you call it? i'm not really sure). so, i figured to make it a little easier by making it count from 1 to 9 instead. that way i'd only have to use one 7 segment LED and there wouldn't be so much wires . i did a little research on how to use the load pin and now the problem is it won't stop counting until 15th.

@papabravo
what do you mean by "tie RESET inactive"?

 

[ericgibbs]

hi papabravo,

Do you mean decode 'A' [#10..... 1010], rather than '9'.

If he reloads '1' on a '9' decode, that just give a count range of 1 to 8.

Regards
Eric

 

[ljcox]

Do you mean decode 'A' [#10..... 1010], rather than '9'.

I would use a 2 input AND gate and connect the inputs to the A & D outputs of the counter.

If he reloads '1' on a '9' decode, that just give a count range of 1 to 8.

Not if he uses the synchronous version which I think from memory is the 74LS163.

 

[ericgibbs]

hi Len,

The 163 and 193 are both synchronous counters.[the 193 is up/dn]

Rechecking my 'sums' I still say detect #10, and reload a '1' will give him a 1 to 9 count.

However, I will hardwire a 193 today, to ensure I'm not talking thru my hat!.

Will let you know.

Regards
Eric

 

[eblc1388]

Decoding a #10 would resulted in a wrong temporary state at the output, albeit very short.

So I would decode a 9, prevent the next clock from clocking the counter but use the clock to Load the counter to 1 instead.

 

[Papabravo]

Gentlemen,

You want the 9 state to last for one entire clock period. I had hoped that the load was syncronous, that is it happens on the clock edge, but it is not. The valid state 1010 happens after the clock edge.

Tie RESET inactive means connect it to logic high or low as appropriate so that it never happens. This translates to MR, pin 14, should be connected to GND.

As suggested earlier the 74LS160 family may be a better match for your purposes. When in doubt make everything syncronous, unless you have a very goood reason for doing otherwise.

 

[ericgibbs]

Hi Len,

Sorry, your turn to buy the beers this time. [next round is my buy OK.]

Decode #10, wraps OK to '1'. Have not included any decode for #11 to#15.

Built and tested, as per attached drawing, OK.

Taking eblc,s point,
I agree I would have to consider the 'very brief' #10 state if I was using the circuit for high speeds, but as the OP is, as I suspect using a push button as a clock, or some other very slow clocking method, it will not be problem.

I guess he is driving LED's , that why I have included in the drawing.

Regards
Eric

 

[ljcox]

Eric,
You missed my point.

The PE in the 74LS163 is synchronous.

Therefore you decode 9, drive PE so at the next clock edge, the data is loaded into the counter.

The decoding I suggested does not cover all of the A ~ F, but you don't need to decode them all. it covers 9, 11, 13 & 15 hence you only need a 2 input NAND.

Doing it that way has 2 advantages:-
It is immune to decoding spikes in the PE waveform.
The counter never goes to 10 (ie. even briefly), it returns directly to 1 from 9.

The attachment is a circuit I designed, built and tested some time ago.

It can be configured to divide by any value between 1 & 255 inclusive simply by applying the appropriate levels to the A ~ H inputs.

I wanted it to count at 20 MHz, hence the NAND and the Tc to CEP connection. For lower clock rates, you could connect Tc to CET and use an inverter from U3/ Tc to the PEs

 

[hjames]

The ugly part of being asynchronous is that when the output is transitioning between 0111 and 1000, there's a chance that the value 1010 or 1001 will appear on the outputs for some amount of time. This would cause the a premature load, causing some counts to be skipped.

The simplest correct workaround I can think of (if hell-bent on using this part) requires another D flip-flop along with the NAND gate for decoding and an OR to gate the /LOAD line. The wrong (but fun way) is to just hack bit 3 to transition slowly with some extra loading

 

[ericgibbs]

hi hjames,

The LS193 is a synchronous counter, not a async/ripple thru counter.

Hi Len,

Can't argue with your circuit, no problem, nice and glitch free.
Lets hope the OP lets us know how he gets on with his project.
How's that leave us with the beer's?

Regards
Eric

 

[ljcox]

Eric,
I think the beers are on you.

I'll be in Sydney for 2 days, so I'll tune in on my return.

cheers,

 

[ljcox]

The ugly part of being asynchronous is that when the output is transitioning between 0111 and 1000, there's a chance that the value 1010 or 1001 will appear on the outputs for some amount of time. This would cause the a premature load, causing some counts to be skipped.

The simplest correct workaround I can think of (if hell-bent on using this part) requires another D flip-flop along with the NAND gate for decoding and an OR to gate the /LOAD line. The wrong (but fun way) is to just hack bit 3 to transition slowly with some extra loading

That's why I suggested a synchronous load. See the circuit I posted earlier.

 

[hjames]

hi hjames,

The LS193 is a synchronous counter, not a async/ripple thru counter.

Regards
Eric

It's a synchronous counter, but there's an asynchronous reset line involved, and gating the output of a binary counter is pretty much the perfect example of a glitch generator. If the two wires going to the NAND decoder gate have different lengths, the NAND gate inputs have different capacitive loadings/threshold voltages, or the two counter flip flops have slightly different clock thresholds, or there's enough induced noise in one of the two lines, you have a race condition and an early load.

The chances of it will probably be pretty low considering the edge speeds involved, but it isn't a good idea in any case.

Actually, a ripple counter would probably be (marginally) preferable since it would always transition the lower bit first. The NAND gate would then see
"01" -> "00" -> "10" when going from '7' to '8'.

 

[ljcox]

It's a synchronous counter, but there's an asynchronous reset line involved, and gating the output of a binary counter is pretty much the perfect example of a glitch generator. If the two wires going to the NAND decoder gate have different lengths, the NAND gate inputs have different capacitive loadings/threshold voltages, or the two counter flip flops have slightly different clock thresholds, or there's enough induced noise in one of the two lines, you have a race condition and an early load.

The chances of it will probably be pretty low considering the edge speeds involved, but it isn't a good idea in any case.

Actually, a ripple counter would probably be (marginally) preferable since it would always transition the lower bit first. The NAND gate would then see
"01" -> "00" -> "10" when going from '7' to '8'.

But I suggested using the PE which is synchronous.

 

[hjames]

But I suggested using the PE which is synchronous.

I was still poking the '193 chip. What's the fun in using synchronous logic - there aren't enough ragged sharp pointy things to maim yourself on! I like a little mental exercise once in a while, and doing all these checks on asynchronous logic is fun in a twisty way.

James

 

[ericgibbs]

hi james,

I assume/d that the OP was stepping thru 1 to 9 and driving LED's, so that he could 'see' the counting action. [school project ??] so I didnt bother too much about de-glitching the outputs.

As you know even with glitches, its an easy task to filter them out, I agree the best solution is to avoid them in the first place.

Do you want to buy a few partly used 193's [joke]

Best Regards
Eric

James & Len,
I think we should write up some tutorials on 'remote viewing' techniques for decoding OP's requests.