Hello,
Have you considered doing it in asynchronous mode ? I think this is FAR easier than having the same clock control each flip-flop. It is more intuitive too ..
You put every flip-flop in toggle mode ( J and K of every flip-flop are both connected to VCC)
You want to count from 000 to 999 .. With BCD ..
9 needs a nibble to be coded, you'll need 3 nibbles (12 bits) .. 12 JK flip-flop all J and K to VCC.
Each flip-flop will toggle on the rising edge of the signal attacking its clock input in our case (if there was a circle next, they would toggle on the falling edge).
In your schematic, a single clock attacks multiple flip-flops..
Here's how I would think about doing it (asynchronous mode)
Let's start with a simple example to illustrate (If you're familiar with this, then I'm writing it for those who are not).. Let's say we want to count from 0 to whatever.
You make a little table of "Previous state" and "Next state" and "see" how things are connected:
Previous state: Next State
H Q3|Q2|Q1|Q0 Q3+|Q2+|Q1+|Q0+
0 0 0 0 0 0 0 0 1
1 0 0 0 1 0 0 1 0
0 0 0 1 0 0 0 1 1
1 0 0 1 1 0 1 0 0
0 0 1 0 0 0 1 0 1
1 0 1 0 1 0 1 1 0
etc ... H being the pin 3 of your NE 555 (you clock signal)
What do we notice here ?
We notice that Q0 (your Least Significant Bit "LSB") toggles on the rising edge of our clock H... SO ?
So the pin 3 of your NE 555 goes to the Clock input of the JK flip-flop representing your LSB (Q0)
Then what ?
We notice that Q1 toggles on each rising edge of Q0 … So Q0 becomes the clock of Q1 (you inject the output of the flip-flop of your LSB into the clock input of the next JK represing the bit1)
Connect H to the clock of Q0
Connect Q0 to the clock of Q1
Connect Q1 to the clock of Q2
Connect Q2 to the clock of Q3
MSB--->LSB Q3Q2Q1Q0 of course..
In the case of detecting a binary Q3Q2Q1Q0= 1010 (decimal 10) in a BCD counter, you can afford detecting only Q3Q1=11 since you won't go further and there won't be another case where those two will be 11..
See attachment figure.. Something like that .. I represented only two nibbles (bits from 0 to 7 .. 0 being the LSB, the flip flop attacked by the clock U4) but you see the pattern, the input of each one goes to the clock of the next..
So you'll only have to put one NAND to each nibble :
First nibble (weakest one, bits(flip-flops) from 0 to 3): A NAND with inputs Q3Q1.. The output goes to the CLR of that very nibble.(The CLR of the flip-flops from 0 to 3)
Second nibble (bits from 4 to 7): A NAND with inputs Q5Q7. Output goes to CLR of that very nibble.
Third nibble (bits from 8 to 11) : A NAND with inputs Q9Q11. Output goest to CLR of that very nibble.
It is not cyclical, so whenever it hits 999 the weakest nine becomes 0, incrementing the tens, it becomes 0 too, incrementing the hundreds, that becomes 0 too..
Cyclical...