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Counter 0 - 999 with flip flops

zimeriljazi

New Member
Please can anyone help me to create a counter with flip flops...it should count from 0 to 999....
It needs to be created with flip flops (JK, D or the others), 7447 bcd decoder, 555timer wich will work as a clock...three 7 segment display....
I know how to create a counter 0 - 9 but I cannot get how to create a 0 - 999 counter...
Please somebody if could help me...
If needed I'll post the 0 - 9 counter that I created in multisim, I tried to link the 0 - 9 three times but it didn't worked :(....
 

trash

Member
BCD is probably going to be your simplest option.
Use an AND gate to detect the value "A" to reset the counter and increment the next counter.

As for the counter, each flip flop is a one bit counter with carry. You can either clock them on falling edges or strobe the "Q" to the next order bit.
12 flip flops (three groups of four), 3 and gates (if the counter rolls to 000)

If you're allowed to use a BCD to 7 segment decoder then that simplifies the display.
 
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crutschow

Well-Known Member
Most Helpful Member
If you can create one 0-9 counter than just use that to clock the next 0-9 counter, causing it to increment by 1 when the first counter rolls over (resets) from 9 back to 0. Each 0-9 counter is thus one BCD digit. You would need three 0-9 counters to count to 999.
 
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zimeriljazi

New Member
Yes I tried that in multisim... I created a 0 - 9 counter than I used that and created the group of three 0 - 9 but they all count sameway.. how do I link the next 0 - 9 clock??? I tried placing an 'and gate' for example when 1010 the and gate output is 1 and I linked that output to the next clock of 0 - 9 but it doesn't work :(
 

crutschow

Well-Known Member
Most Helpful Member
Yes I tried that in multisim... I created a 0 - 9 counter than I used that and created the group of three 0 - 9 but they all count sameway.. how do I link the next 0 - 9 clock??? I tried placing an 'and gate' for example when 1010 the and gate output is 1 and I linked that output to the next clock of 0 - 9 but it doesn't work :(
Post the circuit
 

zimeriljazi

New Member
Here's the circuit...

The circuit of 0-999, If I remove the 7404 they count sameway...with 7404 the two others doesn't work..
And why they count till 1000 then it resets..it should count till 1001..(after it resets for the second time it counts till 1001 but after that it counts till 1000 :S)

Here I didn't placed the 7-segments because that's easy and is not a problem...

Thanks to all :D
 
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trash

Member
The problem is that when the first counter overflows, and resets itself it does not present a high signal to JK input of the next stage.
By the time the next strobe cycle comes around, the logic on the input is already low.
Rather than pass the pulse to the JK inputs of this gate, I would tie the JK high and feed the overflow into the clock of this flip flip.

You might remove the strobe line from all the clock inputs in following stages and use the overflow of the previous stage as the clock.

The rest looks ok. You look like you understand the subject and task just fine.
 

zimeriljazi

New Member
Here's the final...

Ok I solved the problem, I figured out that the reset should clock the next 0-9, in the first 0-999 i misundertood it and connected to the next JK...
Ok now everything looks great except why it counts till 7 and not till 9???
thanks
 

trash

Member
strange, it sounds like the MSB-Q is going high before the other gates have reset. Probably because there's a small delay from the AND gates :)

I simple fix might be to delay the rise of that line. Either with a small capacitor to earth, or two NOT gates to introduce the delay to the overflow NAND gate.
 

trash

Member
Time to isolate the overflow circuit.
Start by disconnecting the MSB bit and ground it on the NAND gate. The circuit should count 0 to F and not overflow.

Reconnect it and isolate the other NAND input. Now it should overflow after 7 or 8 .... oh that sounds familiar !

Might be something there. Nothing catches my attention with the circuit, it looks correct.
 

Jugurtha

Member
Hello,

Have you considered doing it in asynchronous mode ? I think this is FAR easier than having the same clock control each flip-flop. It is more intuitive too ..

You put every flip-flop in toggle mode ( J and K of every flip-flop are both connected to VCC)

You want to count from 000 to 999 .. With BCD ..

9 needs a nibble to be coded, you'll need 3 nibbles (12 bits) .. 12 JK flip-flop all J and K to VCC.

Each flip-flop will toggle on the rising edge of the signal attacking its clock input in our case (if there was a circle next, they would toggle on the falling edge).



In your schematic, a single clock attacks multiple flip-flops..

Here's how I would think about doing it (asynchronous mode)


Let's start with a simple example to illustrate (If you're familiar with this, then I'm writing it for those who are not).. Let's say we want to count from 0 to whatever.

You make a little table of "Previous state" and "Next state" and "see" how things are connected:



Previous state: Next State

H Q3|Q2|Q1|Q0 Q3+|Q2+|Q1+|Q0+
0 0 0 0 0 0 0 0 1
1 0 0 0 1 0 0 1 0
0 0 0 1 0 0 0 1 1
1 0 0 1 1 0 1 0 0
0 0 1 0 0 0 1 0 1
1 0 1 0 1 0 1 1 0


etc ... H being the pin 3 of your NE 555 (you clock signal)

What do we notice here ?

We notice that Q0 (your Least Significant Bit "LSB") toggles on the rising edge of our clock H... SO ?

So the pin 3 of your NE 555 goes to the Clock input of the JK flip-flop representing your LSB (Q0)

Then what ?


We notice that Q1 toggles on each rising edge of Q0 … So Q0 becomes the clock of Q1 (you inject the output of the flip-flop of your LSB into the clock input of the next JK represing the bit1)

Connect H to the clock of Q0
Connect Q0 to the clock of Q1
Connect Q1 to the clock of Q2
Connect Q2 to the clock of Q3

MSB--->LSB Q3Q2Q1Q0 of course..

In the case of detecting a binary Q3Q2Q1Q0= 1010 (decimal 10) in a BCD counter, you can afford detecting only Q3Q1=11 since you won't go further and there won't be another case where those two will be 11..

See attachment figure.. Something like that .. I represented only two nibbles (bits from 0 to 7 .. 0 being the LSB, the flip flop attacked by the clock U4) but you see the pattern, the input of each one goes to the clock of the next..

So you'll only have to put one NAND to each nibble :
First nibble (weakest one, bits(flip-flops) from 0 to 3): A NAND with inputs Q3Q1.. The output goes to the CLR of that very nibble.(The CLR of the flip-flops from 0 to 3)

Second nibble (bits from 4 to 7): A NAND with inputs Q5Q7. Output goes to CLR of that very nibble.

Third nibble (bits from 8 to 11) : A NAND with inputs Q9Q11. Output goest to CLR of that very nibble.

It is not cyclical, so whenever it hits 999 the weakest nine becomes 0, incrementing the tens, it becomes 0 too, incrementing the hundreds, that becomes 0 too..

Cyclical...
 
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zimeriljazi

New Member
Hello,

Have you considered doing it in asynchronous mode ? I think this is FAR easier than having the same clock control each flip-flop. It is more intuitive too ..

You put every flip-flop in toggle mode ( J and K of every flip-flop are both connected to VCC)

You want to count from 000 to 999 .. With BCD ..

9 needs a nibble to be coded, you'll need 3 nibbles (12 bits) .. 12 JK flip-flop all J and K to VCC.

Each flip-flop will toggle on the rising edge of the signal attacking its clock input in our case (if there was a circle next, they would toggle on the falling edge).



In your schematic, a single clock attacks multiple flip-flops..

Here's how I would think about doing it (asynchronous mode)


Let's start with a simple example to illustrate (If you're familiar with this, then I'm writing it for those who are not).. Let's say we want to count from 0 to whatever.

You make a little table of "Previous state" and "Next state" and "see" how things are connected:



Previous state: Next State

H Q3|Q2|Q1|Q0 Q3+|Q2+|Q1+|Q0+
0 0 0 0 0 0 0 0 1
1 0 0 0 1 0 0 1 0
0 0 0 1 0 0 0 1 1
1 0 0 1 1 0 1 0 0
0 0 1 0 0 0 1 0 1
1 0 1 0 1 0 1 1 0


etc ... H being the pin 3 of your NE 555 (you clock signal)

What do we notice here ?

We notice that Q0 (your Least Significant Bit "LSB") toggles on the rising edge of our clock H... SO ?

So the pin 3 of your NE 555 goes to the Clock input of the JK flip-flop representing your LSB (Q0)

Then what ?


We notice that Q1 toggles on each rising edge of Q0 … So Q0 becomes the clock of Q1 (you inject the output of the flip-flop of your LSB into the clock input of the next JK represing the bit1)

Connect H to the clock of Q0
Connect Q0 to the clock of Q1
Connect Q1 to the clock of Q2
Connect Q2 to the clock of Q3

MSB--->LSB Q3Q2Q1Q0 of course..

In the case of detecting a binary Q3Q2Q1Q0= 1010 (decimal 10) in a BCD counter, you can afford detecting only Q3Q1=11 since you won't go further and there won't be another case where those two will be 11..

See attachment figure.. Something like that .. I represented only two nibbles (bits from 0 to 7 .. 0 being the LSB, the flip flop attacked by the clock U4) but you see the pattern, the input of each one goes to the clock of the next..

So you'll only have to put one NAND to each nibble :
First nibble (weakest one, bits(flip-flops) from 0 to 3): A NAND with inputs Q3Q1.. The output goes to the CLR of that very nibble.(The CLR of the flip-flops from 0 to 3)

Second nibble (bits from 4 to 7): A NAND with inputs Q5Q7. Output goes to CLR of that very nibble.

Third nibble (bits from 8 to 11) : A NAND with inputs Q9Q11. Output goest to CLR of that very nibble.

It is not cyclical, so whenever it hits 999 the weakest nine becomes 0, incrementing the tens, it becomes 0 too, incrementing the hundreds, that becomes 0 too..

Cyclical...
Thanks a lot it works fine like asynchronous mode....
 

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