That reset circuit is nonsense and may be a poor attempt to eliminate switch bounce if a manual reset is used.
Although the clock input of the CD4040 has an unlimited rise and fall time, because the clock input is probably a Schmidt trigger, strangely, the reset does not allow slow rise and fall times.
The consequences of a slow rise and fall time on the reset input are that the input gate may be in the linear region long enough to oscillate, which can put the CD4040 into an undefined state.
The CD4040 is not a particularly fast divider, especially with 5V supply lines- you do not say what supply lines are being used. The CD4040 is probably optimum at 10V supply lines, but the gate linear region would then be much wider and the problem with slow rising and falling edges on reset would be exacerbated.
Also, without good grounding, decoupling, and a generally compact layout, all kinds of problems may arise, and remember that the figures you see on the data sheet are under optimum conditions.
Just one word about circuits you see in books, magazines and on the net. Don't think that just because a circuit is published it is correct- the opposite is often the case.
spec
DATASHEET
(1)
https://www.ti.com/lit/ds/symlink/cd4040b.pdf