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Confusion with 1's and 2's complement

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New Member
Thanks visiting this thread.

I am a college student.

I have a little confusion with these complements. Of course i know that in '+' and '-' 2's complement is used but is it limited to only '-' and '+'.

What are the places in which the 1's complement is used and what is the reason for not using the 2's complement there.

And finally why do we have 2 kinds of complements in the first place.


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Twos compliment lets you add and subtract binary numbers by using adding hardware only. If you used sign-bits you would need extra hardware to deal take the sign bit into account at all stages of the math operation, and you would also need separate subtraction hardware. Using sign bits requires a lot "if-else" type stuff. With twos compliment you just add them.

Is one's compliment even used? I thought they just thought it was taught as a stepping-stone before teaching 2s compliment.
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The answer is just a bit deeper. In a parallel adder, it is customary to use twos complement notation and do the addition or subtraction of all bits on one clock cycle.

In a serial adder which computes the sum or the difference one bit at a time it takes one clock cycle for each bit. The ones complement of a number can be computed one bit at a time with a single inverter. The carry out of the most significant position is added to the result to get the final answer. This is called the end around carry.

In the TTL logic of the 1970s we did this by using a counter for the destination register. The end-around carry would increment the counter in one clock cycle or not depending on its value. For an 8-bit ALU we had 10 clock cycles at 8 MHz. for 1.25 usec per instruction.
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