Circuit design assistance needed

[WHYnot86]

The frequencies are based on Nogliers frequencies. I like the idea of the function generator chip however I am looking to make a few of these and would be difficult to calibrate each and every one. For this experiment a square wave is preferable.

 

[alec_t]

If you use a standard watch crystal oscillator at 32768Hz and divide that frequency by 7 using a CD4017 counter, then successive frequency halving in a binary counter would give you these frequencies :- 2340.57, 1170.28, 585.14, 292.57, 146.28, 73.14. Close enough?

 

[WHYnot86]

That's close enough

 

[AnalogKid]

A 75 kHz crystal divided by 10 bits yields 73.2422 Hz, an error of +0.33% +/- 30 ppm without calibration. Smells good enough to me.

CD4060 - oscillator and divider
CD4051 or 4512 - multiplexer and output enable
CD4xxx - 4-bit binary counter - lotsa choices
CD4093 - Quad NAND gate - start/stop flipflop. misc gating

Plus 400 mA output stage, switch debouncing, chip decoupling, etc..

ak

 

[AnalogKid]

Note that when all frequencies are derived from a single oscillator, the frequency error is a constant percentage for all outputs. BUT - a constant percentage translates into an absolute frequency error that increases with frequency. The 2336 frequency would be 2343.75 Hz, an error of +7.75 Hz or +0.33%.

ak

 

[WHYnot86]

Yes I did notice that. But it will be close enough.

Soooo....

How does it all fit together? 
I'm a newbie

 

[AnalogKid]

First pass. Note that U4 is a placeholder for a better sequence counter. Ideally it resets to 0, counts up to 6, then cycles back to 1 (not 0) and repeats. Or, presets to 2, counts to 7, and 8 is tied to the preset. Hmmm...

ak

 

[WHYnot86]

You are a legend! Will have a look at it tomorrow. It's late in Cape Town 

Thanks a million!

 

[AnalogKid]

This is an update to the previous schematic. It took some wrangling to get the central counter to count on the right edge and reset at the right time. The net change is 2 diodes and a resistor. They form an AND gate that detects a binary 6 to reset the counter. The system reset signal loads a binary 0, which is the same effect without having to combine multiple reset signals with more gating.

Note that the OFF switch disables the circuits, but does not disconnect power. All of the CMOS parts have almost zero static current. The only measurable current is through R5.

Feature Creep: Adding a 3-to-8 decoder to the U2 binary output will get you an indicator LED for each frequency selected.

ak

 

[WHYnot86]

Great stuff!
Will be putting it together in the next day or two and will let you know how it turns out.
Thanks again

 

[AnalogKid]

How big a deal is it if the frequencies ranged from 75 Hz to 2400 Hz instead of 73 Hz to 2336 Hz? Each of the six freqs would be +2.6% above your previous list. These can be derived from a much more common crystal or pre-packaged crystal oscillator.

ak

 

[WHYnot86]

That could work. What crystal would that be?

 

[AnalogKid]

1.2288 MHz / 2^14 = 75.

2.4576 MHz is even more common, but a 2^15 divider with all of the last 6 bits brought out is not.

ak