Certainly no solution at all, but I was just amazed at how anyone could post such a poor 'circuit'? - it fails on absolutely every level.
I suggest you reassess your electronics knowledge, the entire reason for doing it the way I proposed (and the reason it's always done that way) is because it DOESN'T lose 0.7V in that configuration, only about 0.1V or so (which is the best you can do). This is also the reason you should switch low-side, as you only need a single NPN then to give the lowest possible loss. The configuration also gives the best possible base current, so ensures best switching (your 'solution' doesn't 'switch' at all, but runs both transistors in linear modes).
But apparently you weren't aware of that basic information?, which could explain your peculiar design effort.
Presumably he was talking about my solution, the standard method of doing it.