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Calculation of DNL and INL for a R/2R DAC

Discussion in 'Circuit Simulation & PCB Design' started by Gopal Adhikari, Jul 10, 2017.

  1. Gopal Adhikari

    Gopal Adhikari New Member

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    Hi teachers out there,

    I have designed a 4-Bit DAC whose Output is as shown in the attached simulated.txt.
    I need to calculate the INL and DNL of the DAC. It also has some gain error.
    I tried calculating the dNL and INL. But I think something Fishy is going on with my calculations.
    Please help me calculate INL and DNL of this DAC.
    i consulted many books and i found some texts but could not verify my calculations.

    the picture file contains the calculations done in excel. sorry this forum doesnot support excel file so, i have shown some calculations in the text file.

    Please help. what am i doing wrong. how to calculate these parameters with gain and offset errors.

    thanks in advance.
    Gopal
     

    Attached Files:

  2. MikeMl

    MikeMl Well-Known Member Most Helpful Member

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  3. Gopal Adhikari

    Gopal Adhikari New Member

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    Dear Mike,

    I have gone through this app note already.The problem is that my DAC has some gain errors, I don't know how to nullify this error.
    this note suggests that INL can be measured after the other errors are nullified

    if you have some example workout, it would have been a lot help.

    thanks for the reply.

    gopal
     

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