Basic capacitor question

[tony ennis]

This schematic

**broken link removed**

Can be found here.

Ok, now that the attribution is out of the way, I am having some trouble understanding part of this. I'll attempt to re-interpret what the author said.

So nearly immediately, both capacitors are charged through the 470k caps. With no path to ground, neither LED can light.

One of the transistor bases will win the race and start the flashing.

1. As the caps are charging, are the negative side of the caps sucking the current from the 100k resistors, starving the transistor bases?

2. Before the flashing begins, does the voltage across the caps actually decrease over time as the current through the 100k resistor 'catches up' to the positive side of the caps?

3. Once the cap is somehow satisfied (or while it is on its way to happening) the voltage on one of the transistor bases gets high enough (.7v?) and the transistor closes. Let's say the left transistor (TL) is closed.

4. TL allows current to flow through LEDL. CapL drains through TL too. Since CapL(+) is 0v, does this continue to starve the TR's base? And isn't having the voltages reversed on a polarized cap a bad thing?

5. Now TR's base is starved, CapR starts charging and pulling current away from the TL's base. At some point TL opens. Now CapL(+) is suddenly 6 volts or so. The state of CapL is weird to me.

This is where I am so confused I can't make progress.

If someone could explain what's happening with these caps, using tiny teeny words, I'd appreciate it.

 

[MikeMl]

This schematic

**broken link removed**

Can be found here.

Ok, now that the attribution is out of the way, I am having some trouble understanding part of this. I'll attempt to re-interpret what the author said.

So nearly immediately, both capacitors are charged through the 470k caps. With no path to ground, neither LED can light.

The original author doesn't understand the circuit. Assume that both capacitors have an initial charge of zero volts. When the battery is connected, the 10K base resistor pulls the base of the NPN to 0.7V, the Vbe for a turned on Si NPN. The collector is also at 0.7V, just below Vce(sat), but the voltage across the cap is still zero (you cannot change the voltage across the capacitor in zero time). Note that until it breaks into oscillation, both transistors (and LEDs) are ON!!!

One of the transistor bases will win the race and start the flashing.

I spiced the circuit, and with identical values it will not start flashing. To make it start, I had to make one of the capacitors 100.1uF, or make one of the base resistors 10.1K. IOW, there has to be a slight imbalance somewhere...

1. As the caps are charging, are the negative side of the caps sucking the current from the 100k resistors, starving the transistor bases?

At the instant the circuit starts up, you can think of the two sides as two capacitor-coupled inverting amplifiers. - times - is +, so it has positive feedback. The gain is clearly greater than 1, so by the Barkhausen Criterion, it will oscillate.

Look at the Spice results below. I start out with the 9V battery at 0V, so the initial DC solution has everything at zero V. At 100ms, I ramp the voltage up to 9V, and the circuit takes a while to "take off". Note the two mini-cycles before the amplitude builds up. Also look at the two base voltages, and the two collector voltages.

Once the full cycles are established, you can see how one transistor is on while the other is off.

2. Before the flashing begins, does the voltage across the caps actually decrease over time as the current through the 100k resistor 'catches up' to the positive side of the caps?

Which end of the capacitor is more positive, the collector end or the base end? The transistors are On, meaning that the collector end is clamped by the collector voltage, and the base end is clamped by the base voltage. It is the slight difference in the base voltages which is amplified by the loop gain that starts the collector voltage diverging.

3. Once the cap is somehow satisfied (or while it is on its way to happening) the voltage on one of the transistor bases gets high enough (.7v?) and the transistor closes. Let's say the left transistor (TL) is closed.

Initially both transistors are on. Only after full oscillation is established are the transistors one on and the other off.

4. TL allows current to flow through LEDL. CapL drains through TL too. Since CapL(+) is 0v, does this continue to starve the TR's base? And isn't having the voltages reversed on a polarized cap a bad thing?

Look at the plot of V(C1,B2), which is the voltage across C1. Note that it goes from -0.7V to +6.8V, which means that if C1 is a polarized cap, it should be installed with the positive end to the base. If installed that way, it will be reverse polarized by only 0.7V, which all electrolytics will tolerate.

5. Now TR's base is starved, CapR starts charging and pulling current away from the TL's base. At some point TL opens. Now CapL(+) is suddenly 6 volts or so. The state of CapL is weird to me.
...

Keep staring at the simulation.

 

[millwood]

you naturally will have some imbalance in devices, which you don't have in spice, unless you intentionally create it.

the circuit works the following way:

1) assuming that one side is charged up faster than the other. Let's say that the right transistor is turned on. Its collector will have very low voltage, typically less than 1v for bjts.

2) now, the 10uf capacitor on the right is being charged up through the 100k resistor on the right.

3) as that voltage on the 10uf capacitor on the right reaches 0.7v, it turns on the transistor on the left, which in turn turns on the led on the left.

4) as the left transistor is turned on, its collector goes low and that bleeds the charges in the capacitor on the left, which in turn turns off the transistor on the right.

5) at the same time, that very capacitor (on the left) is being charged up by the 100k resistor on the right, and the process starts all over again.

 

[MikeMl]

...
the circuit works the following way:

1) assuming that one side is charged up faster than the other. Let's say that the right transistor is turned on. Its collector will have very low voltage, typically less than 1v for bjts.

Except that this is not the initial condition right after power is applied, and it does not describe how the astable starts-up. The simulation shows that BOTH transistors are ON at the same time prior to start-up. In fact both collectors and both bases are at ~0.7V, and both capacitors are charging so that the base ends stay near 0.7V while the collectors are both moving toward saturation (~0.1V). One collector reaches saturation before the other is what finally tips the balance and starts the oscillation process.

 

[tony ennis]

Thanks for the spice simulation. Newbishness aside, it is no wonder it was confusing - the circuit isn't really stable at the beginning.

I will ponder this once I am not at work...