Bank, Page

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ibwev

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Does each General Purpose File Register contain 1 page with 512 instruction lines? For example, PIC16F690 has 96 bytes of General Purpse Registers in Bank 0. Does this translate to having 96 pages with 512 instruction lines available to each page?
 
No, a GPR is a single 8 bit byte, so bank zero contains only 96 bytes of GPR's.

Also instruction lines don't go in GPR's, you need to consider the Harvard architecture used.
 
Thanks for beginning to clear my understanding of banks and pages.

Figure 1-3 of the PIC16F690 shows "4K X 14 Program Memory". Does this mean the chip can hold 4,000 lines of code or 7 pages with 512 instruction lines per page with an 8th page containing only 416 instruction lines?
 

4096 lines of code, you're getting confused by pages - which aren't 512 words anyway.
 
Pay close attention to banks...as GPR banks are not the same as code pages, they are separate. GPR contains user variables etc. code or prg memory contains the hex code instructions as compiled by the assembler (MPASM) or compiler (C,BASIC etc).

GPR is made up of high speed static RAM, code space is slower FLASH ram. Therefore GPR is volatile and code RAM is not...code RAM is similar to EEPROM.However, EEPROM can handle many more write operations than FLASH code RAM. EEPROM & FLASH RAM write very slowly compared to static GPR. Read speeds are comparable, or at least don't require wait states during prg execution to be read.

Note well: if you intend to do assembly programming that banks and pages become essential knowledge very quickly. Compiler's handle that aspect of memory mgmt for you!

Note also that the special function registers in the PIC are usually dedicated GPR locations and can usually be written to and read from.

The PIC datasheet is your friend, it contains all the answers once you know the questions.
 
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Thanks for the explanation.
 
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