a node is floating?

[Heidi]

When a current source and a capacitor are connected like the above in Pspice, it reports that node a is floating. What does it mean the node is floating?

Thank you!

 

[steveB]

Floating means the node a is not fixed to a particular voltage. Personally, I don't think that is the case, so i'm not sure why you get that error. Perhaps you need to specify an initial voltage for the capacitor or do something else to make the software work. I cant say for sure because I'm not familiar with your software.

 

[JoeJester]

When you got the error, was there a help button?

Typically, you need to have the equivalent of an internal resistance shunting the capacitor terminals, or that could be considered an irregular circuit. Place a 1 Meg resistor in parallel with the current generator and see if that clears the error.

 

[Heidi]

When you got the error, was there a help button?

Typically, you need to have the equivalent of an internal resistance shunting the capacitor terminals, or that could be considered an irregular circuit. Place a 1 Meg resistor in parallel with the current generator and see if that clears the error.

Indeed, a resistor in parallel with the current source will solve the problem. What I don't understand is how a node can be 'floating'. Steve gave the answer, perhaps I can put it this way: the node is 'floating' because the software can not decide its voltage, correct?

 

[crutschow]

LTspice does not report an error for a current source driving a capacitor so not sure why PSpice does(?).

 

[JoeJester]

LTspice does not report an error for a current source driving a capacitor so not sure why PSpice does(?).

According to twiki ...

As a convergence aid, floating nodes in LTspice include a hidden default shunt resistance to ground.

Floating nodes are typically created when only connected to capacitors and/or current sources.

ref: http://ltwiki.org/index.php5?title=Undocumented_LTspice

I realize the following is not in English ... but you might glean some info on correcting the problem your having.

p.s. I use TINA

 

[steveB]

It seems this is just a numerical solution issue. Strictly the node a is not floating, and there is no issue finding a mathematical solution. However numerical solutions can be problematic. An integrator is marginally stable and the added parasitic resistor makes the system stable and amenable to a reliable numerical solution. Consider that the slightest offset in the input sine wave would cause the error to get integrated. It might diverge in the positive direction or in the negative direction.

 

[MrAl]

Hi,

I must have missed this thread earlier...

It is usually the DC status of a node that triggers an error like this so if you had say just two capacitors connected in series with the two open ends connected to DC sources it might complain that the common node was "open circuit" or some other complaint like "node n has no DC path to ground".

In your case it could be happening because the upper node is connected to only a capacitor and a source that might be considered an infinite resistance for DC current, so that may trigger the complaint. Or, it could be that the source is an AC source so it thinks the upper node is open for DC current.

To find out more, you could try using a DC current source and see if that changes anything. You could also try the two caps in series test and use a voltage source or something but dont connect anything to the junction of the two caps.

What always solves these problems however is to connect a very large value resistor (like 10 megohms) from the node to ground or from the node to some DC source voltage.

In some simulators this happens with an AC voltage source driving a full wave bridge rectifier, where the bridge then drives a capacitor with one end of the cap connected to ground (so the source seems to be floating). The fix is a 10 megohm resistor connected from one side of the source to ground.

You'll note that in simulators things are a little different than in real life because certain concessions have to be made. For example, if you 'could' have a floating DC source of 10 volts for example one terminal would read "-5v" and the other "+5v".
They dont want any "open" circuits for DC current because then even the tiniest DC current would eventually cause an infinite voltage which would then mess up the calculations for the entire matrix (BTW we looked at the effects of a small offset DC current through a capacitor in another thread).

 

[JoeJester]

Unresolved calculations leading to "irregular" circuits happens. Some software, like LTSpice addressed this by automatically having the high shunts across current sources. I didn't know that because 1, I'm not a LTSpice user and 2. the software I use I can add the internals if I want. I only looked into it because of this thread and two simulations caused the "same" error and LTSpice didn't. Now that I know there are reasons, logical reasons, because the creator of LTSpice choose to add conductance to the sources to prevent such errors.

I've never investigated the other programs out there. My first software was Electronics Workbench, which later became Multisim. I moved to TINA, and the free version of that is called TINA-TI offered by Texas Instruments. I do have the option of automatically having conductance added to the sources, but I haven't done so.

Like all other tools of the trade, there are limitations. The end user should be aware of such problems.

 

[MrAl]

Hi,

Out of all the circuits i stuck casually into simulators over the years i've only had to add high value resistors like 10 megs to maybe 1 percent of them, if that, because of the DC path to ground issue.

Convergence issues are harder to solve sometimes.

 

[Heidi]

Hi,

I must have missed this thread earlier...

It is usually the DC status of a node that triggers an error like this so if you had say just two capacitors connected in series with the two open ends connected to DC sources it might complain that the common node was "open circuit" or some other complaint like "node n has no DC path to ground".

In your case it could be happening because the upper node is connected to only a capacitor and a source that might be considered an infinite resistance for DC current, so that may trigger the complaint. Or, it could be that the source is an AC source so it thinks the upper node is open for DC current.

To find out more, you could try using a DC current source and see if that changes anything. You could also try the two caps in series test and use a voltage source or something but dont connect anything to the junction of the two caps.

What always solves these problems however is to connect a very large value resistor (like 10 megohms) from the node to ground or from the node to some DC source voltage.

In some simulators this happens with an AC voltage source driving a full wave bridge rectifier, where the bridge then drives a capacitor with one end of the cap connected to ground (so the source seems to be floating). The fix is a 10 megohm resistor connected from one side of the source to ground.

You'll note that in simulators things are a little different than in real life because certain concessions have to be made. For example, if you 'could' have a floating DC source of 10 volts for example one terminal would read "-5v" and the other "+5v".
They dont want any "open" circuits for DC current because then even the tiniest DC current would eventually cause an infinite voltage which would then mess up the calculations for the entire matrix (BTW we looked at the effects of a small offset DC current through a capacitor in another thread).

In the above diagram, what I can't understand is why the simulation program worries about whether there is a DC path for a DC current at the top node. The AC current source didn't have a DC offset after all.

Is it because that in other cases there might be a DC current that might flow into the cap if there isn't a path for the DC current to flow away?

I have a few more related questions.
First, can we make/produce a "pure" sinusoidal current source without any DC offsets in real life?

In the above circuit, there seems no current flowing into the capacitor in steady state, all the AC current flows through the DC voltage source V3, even I raise the frequency to 10K Hz. Is it because the impedance of the DC voltage source is much smaller compared to that of the cap?
Or is it because the cap is already "fully charged", the only way for the current to flow is through the DC voltage source?

 

[MikeMl]

You are quibbling (look up the word) about how many angels can dance on the head of a pin (look that up, too).

In the current-source driving a capacitor circuit, in the real world, it is impossible to build a current source that doesn't have some resistance shunting it, or that doesn't have a dc offset. It is impossible to build a capacitor that doesn't have some internal DC leakage.

In the current-source driving a capacitor circuit in parallel with a voltage source, it your lack of understanding of KVL is causing your confusion. The impedance of an ideal voltage source is zero, so the voltage across the capacitor will be 1mV, regardless of the what the current source is doing.

A simulation is only as good as how the circuit you enter models reality. Reality dictates that capacitor and/or current source be shunted with a high, but finite resistance. Put it in explicitly with PSpice, or let LtSpice put it in for you...

 

[MrAl]

Hi Heidi,

As we were saying, it could be just because the program is written to not allow any node to exist without a DC path to ground so that it wont ever be able to develop an infinite voltage, but you could try connecting a large resistor across the cap to find out.
It could also be that it does not like the starting condition of a zero voltage across the cap when there is zero current through it and it's driven by a sine source. This results in a response not of a pure sine wave, but as:
1-cos(t*w) times 1/(w*c).
So we end up with a DC offset across the cap with a sine source. Maybe it doesnt like that.
The wave 1-cos(t*w) times any constant is a wave that is always above zero, not a sine wave.

I dont think you can build a pure sine wave current source with just passive components, but with active components you could build something that resembles this very closely. For example, if you had a source with non zero offset and you connect a large capacitor in series with it the capacitor will remove most of the DC offset, except for the leakage of the cap.
Alternately, you could put a DC current source in parallel with the sinusoidal source and control the DC current source with feedback from measuring the DC offset, and that should keep it very low. The precision would then depend on the precision of the control circuit. Back in the 1980's when i worked in the industry we actually had to do something like this with a synthesized sine converter design, where the slightly non symmetrical PWM input to the transformer would cause a DC offset current and that would push the operating point of the transformer up along the BH curve of the core, and that would cause operation that was closer to saturation for some points in the drive wave which in turn would cause more audible noise (audible noise is more of a problem with high power converters and many people did not want to sit in the same room with some of them).

So you might do a few experiments to see what is really causing the problem with your simulation, but in the end if you can solve it without affecting the circuit too much then you should be happy. If a 10 meg resistor does not compete with any other time constant in the circuit then i think you will do well to add a resistor

 

[Heidi]

In the current-source driving a capacitor circuit, in the real world, it isimpossible to build a current source that doesn't have some resistance shunting it, or that doesn't have a dc offset. It is impossible to build a capacitor that doesn't have some internal DC leakage.

In the current-source driving a capacitor circuit in parallel with a voltage source, it your lack of understanding of KVL is causing your confusion. The impedance of an ideal voltage source is zero, so the voltage across the capacitor will be 1mV, regardless of the what the current source is doing.

Thank you very much MikeMl. You gave simple, clear and direct answers to my questions.

I especially like this paragraph:

A simulation is only as good as how the circuit you enter models reality. Reality dictates that capacitor and/or current source be shunted with a high, but finite resistance. Put it in explicitly with PSpice, or let LtSpice put it in for you...

And thank you very much MrAl, especially for your patience with my silly questions. : )

 

[MrAl]

Hi Heidi,

Well you know what they say, "There are no silly questions, just silly people."
Just kidding of course
That's really just a goof on, "There are no stupid questions just stupid people." ha ha.

Seriously though if i had a dollar for every silly question i asked, i'd have a lot more money right now.
And more to the point, how else can we learn if we dont ask questions?
And sometimes the answers dont seem like they would be even possible sometimes until we get the right answer.

If you'd like to hear about some strange questions being asked, a couple weeks ago a friend and i were asking each other how a photon (or electron for example) could go back in time to alter its physical manifestation to either a particle or a wave. When it should be clear that it ALREADY manifested itself into a wave from a particle it should stay that way right? Well it turns out that one theory holds that it somehow has the ability to go back in time BEFORE it became a wave and change itself back into a particle, in anticipation of a future interaction with another particle even after it should have become a wave by then.
So the question might seem silly at first, about a wave going back in time so it can change itself into a particle, but it is a valid question that comes up with the two slit experiment.

 

[Heidi]

Thank you very much, MrAl, for your encouragement, although I didn't quite understand your "strange" question. : )

So far my confusion has been solved. I've been enjoying my time here, I'll be back soon and that's for sure.

 

[Corky]

Hi all,

MrAL i think you went of track a bit there although I love this theory and id reccomend Heidi to look it up if she wants to fry her brain like i did haha.

It definately proves anything can happen and it doenst always make sense to everyone and sometimes anyone haha

stick with it Heidi