Another method uses counters. You need a binary up/down counter with jam inputs, a BCD up counter, a BCD to 7-segment LED readout decoder, and a clock (plus some timing logic). The BCD counter and BCD to 7-segment decoder can be combined in one unit if devices such as the CD4026B or CD4033B are used
In operation the binary word is parallel transferred (jammed) to the binary up/down counter (configured to count down). The two counters then start with the same clock
input, the binary counter counting down and the BCD counter counting up from zero. When the down counter reaches zero, the counting is stopped. The BCD counter now contains the value of the binary word in BCD format. This BCD signal drives the BCD to 7-segment LED
drivers to display the output in decimal format.
The number of chips for 8 bits would be one 8-bit counter (or two 4-bit counters), three decade BCD counters, and three BCD to 7-segment converters for the three digit readout, plus the timing logic circuits.
The timing consists of a single pulse (such as generated by a Flip-Flop) to load the data into the binary counter and start the sequence, and logic to detect the zero count and stop the count.