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Man you must be bored if this was all you could find to hassle me about!
I have a life outside of ETO and playing with electronics so I do what I please when I have a chance. I make mistakes when I draw and I am more than happy to have others point them out so I can correct them when I get time. If you have a better idea for this thread and a fix for my circuits then you are welcome to put some positive input in at any point along the way.
As far as lillian or anyone else goes if they cant figure out the basics of op amps and 555 IC based PWM on their own then they just have to wait until I have time to work on this stuff myself to find out what I printed wrong. I am not trying to be rude but I just don't play around with the hobby level electronics much any more simply due to lack of personal time. It just goes with my work and being married now which are higher priorities for me.
BTW I measure the value of a thread by view count not post count or speed. How many views have your best threads pulled in in any time frame?
Given the relative simplicity of each stage of this circuits design there is a limited amount of tuning to be done. The two 555 Timer IC’s need to be fine tuned for 50/50 duty cycles which if you do not have a oscilloscope available they can be initially cheated to produce very slow cycle times by temporarily replacing the timing capacitors and resistors with high value ones that will bring the cycle times up into the many seconds to minutes ranges. From there they can be set accurately just by using a simple clock to time the high and low events of the outputs.
There is also the possibility for some natural DC offset to occur on the power transformer primary due to the variations in the component tolerances. The simplest way to adjust that a basic amp reading of the inverters input current while the 50 or 60 Hz function generator is disabled. At a 30 KHz switching rate a common 50 – 60 cycle power transformer will have a very low idle current. If it does not there is a small DC offset current occurring that is pulling the duty cycle one way or another and that can be easily corrected by adjusting the biasing pot VR4 on U1 until a minimum input current reading is found.
Lastly to get the correct output voltage the signal being fed from U3a is adjustable via VR3. This is in a sense basically turning up the volume on the 50 or 60 Hz sine wave signal. From there the feedback circuit of U3a will try and keep the output voltage of the power transformer level.
If you are looking for a just for the fun of it experiment to try here is an interesting alternate use of this circuit disconnect the 50 or 60 Hz sine wave signal going into VR3 and replace it with an audio signal. This now makes the inverter circuit work as a surprisingly effective and efficient low frequency high power class D audio amplifier!
*Please note that I am not the world’s greatest schematics draftsperson and there is the good chance I could have a resistor or two or a capacitor or two mislabeled. I tried to make sure everything is correctly labeled but still keep it in mind there could be an error or two with my as drawn schematic but more importantly none of these components are set in stone so if you have an alternate component that is available and you can modify the circuit to work with it then by all means do so!