hi friends
i am a newbie here
i am designing a 4 bit gcd processor on winCUPL
the algo i am using is
if(a>b) a=a-b else b=b-a till anyone becomes 0
i have designed the comparator and the subtractor for the circuit
but can some one help me in telling me whether i can implement it using FSM or by some better method
i am a newbie here
i am designing a 4 bit gcd processor on winCUPL
the algo i am using is
if(a>b) a=a-b else b=b-a till anyone becomes 0
i have designed the comparator and the subtractor for the circuit
but can some one help me in telling me whether i can implement it using FSM or by some better method
