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3-stage BJT amplifier design

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maknelly90

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Hey guys, I am currently designing a 3 stage BJT amplifier with a 3V DC source. I am using 20mV as my input and I want a gain of -20V/V. However, I have a limitation of 50k ohms as my input impedance. In my completed circuit, I currently have a gain of -3 with a slightly larger positive gain than negative gain but I meet the imput impedance requirements.

In my second schematic, I have completed stage 2 and 3 of the amplifier. Stage 3 is my buffer stage. I am looking for a gain of -5 n my second stage to reach my goal of -20. I have chosen my gain for the first stage to be -4 so that the second stage for my gain is -5. If I simulate this schematic, I get a 400mVpk with an input of 80mVpk which is exactly what I need. However, my input impedance will be lowered because of the small resistance in the emitter of the 2nd stage.

Do you guys have any advice for me of achieving a -20V/V gain while having an input impedance in the first stage of 50k ohms?
 

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  • 2nd and 3rd stage with gain of -20.JPG
    2nd and 3rd stage with gain of -20.JPG
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hi,
You have not stated what bandwidth you require from the 3 stage amp.?
 
In the completed circuit you still did not meet the Zin requirements, because the resistance (Beta x RE1) is in parallel with RB1 and RB2 as well.

50K is a large input impedance for BJT as well as a small battery voltage.

If the supply voltage was higher than the Zin could be met with BJT, but 3V. is too small to get that kind of Zin.

With the supply of 3v. your using ,You could use a FET in the input, or make a BJT buffer stage, to handle the Zin.
However the FET would be pushing it with a smallish battery.

Probably a BJT buffer of some sort to get a required Zin.

Something like this
Zin =~60K using beta of 50 for both transistors
Gain =~5
Zout =~5K

high Zin.jpg

The reason for higher Zin is the 2 transistor emitter resitances multiplied by Beta.

Even assuming a small value of 50 for beta still gives significant input resistances.
 
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