If a port pin is set high and then low for the duration of the counting period, will that produce a sufficiently accurate gating of the signal being counted? (different delay of the port pin going high compared to going low?) Or should I use an external high-speed toggle flip-flop so that the external gating period could be the time between two successive up-edges?
Where did you get the Rubidium freq standard?? And how much? I want one.
Yep I would use the 10Mhz standard as the PIC osc.
You can forget any gating system if you want accuracy. You need to use free running timers and design the period measuring software so the entry error is statistically equal to the exit error, then average over sufficient samples to cancel the errors.
NewCount
clrf TMR0 ; clear TMR0 and prescaler |B0
bcf INTCON,T0IF ; clear T0IF interrupt flag |B0
clrf CountL ; clear 24 bit counter registers |B0
clrf CountH ; |B0
clrf CountU ; |B0
movlw 200 ; |B0
movwf msctr ; gate timer = 200 msecs |B0
movlw TRISIO ; |B0
movwf FSR ; setup TRISIO indirect access |B0
bsf INDF,2 ; counter "on" (T0CKI = input) |B0
;
; count pulses on the T0CKI input for precisely 200-msecs
;
GateOn setz ; set Z = 1 |B0
btfsc INTCON,T0IF ; TMR0 overflow? no, skip, else |B0
incf CountU,F ; bump CountU, Z = 0 |B0
skpz ; TMR0 overflow? no, skip, else |B0
bcf INTCON,T0IF ; clear T0IF interrupt flag |B0
DelayCy(1*msecs-8) ; delay 1 msec minus 8 cycles |B0
decfsz msctr,F ; 200 msecs? yes, skip, else |B0
goto GateOn ; loop again |B0
bcf INDF,2 ; counter "off" (T0CKI = output) |B0
btfsc INTCON,T0IF ; TMR0 overflow? no, skip, else |B0
incf CountU,F ; bump CountU |B0
bcf INTCON,T0IF ; clear T0IF interrupt flag |B0
;
; collect 1:256 prescaler value
;
movf TMR0,W ; |B0
movwf CountH ; save TMR0 value |B0
Flush bsf STATUS,RP0 ; bank 1 |B1
bcf OPTION_REG,T0SE ; clock on rising edge |B1
bsf OPTION_REG,T0SE ; clock on falling edge |B1
bcf STATUS,RP0 ; bank 0 |B0
decf CountL,F ; decrement counter LSB |B0
movf TMR0,W ; |B0
xorwf CountH,W ; prescaler overflow into TMR0? |B0
bz Flush ; no, clock it again |B0
;
; do something with the 24-bit (frequency/5) count
;
Hi MikeMl,
Just wondering why you decided on 100-MHz?
You might consider using Timer 0 with its 1:256 prescaler for a 50-MHz counter and using a high speed divide-by-two counter on the T0CKI input to realize a 100-MHz top end.
You don't need any fancy "gate" hardware to turn the counter on and off. Just toggle the T0CKI pin from an output to an input to start the counter and after a precise period toggle it back to an output to stop the counter. Use a 1000 ohm resistor between signal source and T0CKI pin to absorb the input signal while T0CKI is configured as an output.
Timer 0 is an 8-bit counter on most PICs so you would use TMR0 register value for the middle 8 bits of your 24 bit result and use Timer 0 overflows for the upper 8 bits of the 24 bit result. With a 50-MHz input signal you could expect a Timer 0 overflow approximately every 1.3-msecs so it's important to check for overflow at least that often while counting. Capturing the 1:256 prescaler value and using it for the least significant 8-bits of the 24-bit count is pretty well documented and shown below.
The 16F873/4 I am familiar with does not have this capability. It samples the external clock with the instruction clock.
Which PICs can do this? Again, the one I most familiar with does not allow reading the value in the prescaler, and Timer 0 will not count at 50MHz.
You might wish to have a look at the Silicon Chip 50MHz frequency meter. It uses no external dividers and gates the signal using an IO pin. Apparently it can read up to 64MHz (this may be a limitation due to the transition time of the 74HC132 gates and not the PIC). It also uses the obsolete 'F84, so it may be possible to read an even higher frequency directly with a newer PIC model.
Circuit diagram may be seen here:
A Low-Cost 50MHz Frequency Meter
Your 16F873 and 16F874 will count to 50-MHz. Look at parameters 41 Tt0L and 42 Tt0P in TABLE 15-4: TIMER0 AND TIMER1 EXTERNAL CLOCK REQUIREMENTS. That same table indicates that Timer 1 in asychronous counter mode is only good up to about 16-MHz.
Your 16F873 and 16F874 can read the 1:256 prescaler by toggling the T0SE edge select bit as described in my previous post.
...
Your 16F873 and 16F874 will count to 50-MHz. Look at parameters 41 Tt0L and 42 Tt0P in TABLE 15-4: TIMER0 AND TIMER1 EXTERNAL CLOCK REQUIREMENTS. That same table indicates that Timer 1 in asychronous counter mode is only good up to about 16-MHz.
Your 16F873 and 16F874 can read the 1:256 prescaler by toggling the T0SE edge select bit as described in my previous post.
...
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