cmos

  1. CMOS Logic input C limitations

    Discussion why hanging large caps at input of CMOS logic not a good idea (Toshiba App Note) . https://e2e.ti.com/support/logic-group/logic/f/logic-forum/883065/cmos-logic-input-capacitor-maximum-value https://toshiba.semicon-storage.com/info/application_note_en_20210131_AKX00111.pdf?did=63525...
  2. Designing Differential amplifier with differential output

    Hello! I have done calculations for designing a differential amplifier (DA) with differential output. I simulate (using cadence ) the DA with the calculated values and perform the DC analysis of the circuit to inquire all the transistors are operating in saturation. However, I did not get all...
  3. Problem in demodulating differententially modulated signal.

    Hello everyone, I am designing LPF based differential demodulator(LPF_DDM) to retrieve differentially modulated signals, which are on-chip capacitive isolated [shown]. LPF_DDM includes a differential amplifier, LPF, and Schmitt trigger. I designed a two-stage opamp [specification below], as a...
  4. Schmitt trigger based NAND gate

    Hello Everyone, If someone can help me to understand how to calculate the hysteresis of the Schmitt trigger-based NAND gate? Which MOSFET's dimension decides the Vth_H and Vth_L? Thanks.
  5. Designing Schmitt trigger oscillator using CMOS NAND gate.

    Hello, I am designing a Schmitt trigger oscillator based on a CMOS NAND gate. The block diagram along with schematics and its results are attached for your reference. I am using the CADENCE tool with 0.35um technology. Question: it can be seen in the result, the charging time of the capacitor...
  6. S

    Bipolar transistor

    Hello everyone, I have a little issue here. I know it's not really hard but it has been a moment since I've worked with circuits like this and transistors, so I can't figure out this circuit... The question is: In DC analysis, calculate the bipolar transistor's voltages Vb, Ve, Vc. Deduce the...
  7. J

    Subthreshold Transconductance Amplifier Design

    As part of a broader project, I am designing IC circuit using CMOS to one of the first steps I'm working on is the filtering a series of pulses with of the noise. The actual pulses are around 1 kHz so I am implementing 2nd order sallen-key high pass filter. Since the capacitance is limited to...
  8. J

    Subthreshold MOSFET Transamp

    As part of a broader project, I am designing IC circuit using CMOS to one of the first steps I'm working on is the filtering a series of pulses with of the noise. The actual pulses are around 1 kHz so I am implementing 2nd order sallen-key high pass filter. Since the capacitance is limited to...
  9. J

    How to make flip-flop (frequency-divider) with schmitt inverter?

    Hi Ideally, i'm looking for a simple frequency divider that i can feed a square wave, using only schmitt inverters or schmitt NAND (just one if possible). Should work over a wide input-frequency range. The posts below provide a schematic for a so-called "flip-flop" (which i think is really a...
  10. A

    USB 2.0 webcam design ideas

    Hi Team, I want to design a USB 2.0 webcam. Could you please guide on the steps involved and the components required (preferably Texas Instruments). I know that a CMOS sensor is required but not sure where to get them and also how to convert the data into a USB format. Thanks, Arun
Cookies are required to use this site. You must accept them to continue using the site. Learn more…